This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM.  Remove it.  As this is the last
ARCH_T4160 platform, remove that support as well.
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM.  Remove it.  This is also the last
of the ARCH_MPC8641/MPC8610 platforms, so remove that support as well.

Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

These boards have not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM.  Remove them.  As this includes
the last ARCH_MPC8572 platform, remove that as well.

Cc: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: NTom Rini <trini@konsulko.com>
Acked-by: NPeter Tyser <ptyser@xes-inc.com>

These boards have not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM.  Remove them.  As this is the only
ARCH_MPC8555 platform left, remove that support as well.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM.  Remove it.  As this is the only
MPC8541 target left, remove that architecture support as well.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

These boards have not been converted to CONFIG_DM_MMC by the deadline.
Remove them.  As the P5020 is the last ARCH_P5020 platform, remove that
support as well.

Cc: Andy Fleming <afleming@gmail.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Use CONFIG_IS_ENABLED() macro, which provides more convenient
way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs
for both SPL and U-Boot proper.

CONFIG_IS_ENABLED(DM_I2C) expands to:
- 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y',
- 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y',
- 0 otherwise.

All occurences were replaced automatically using these bash cmds:
$ find . -type f -exec sed -i
     's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
    's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
    's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
Reviewed-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NIgor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.

LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes
interface to support three PCIe gen3 interface.
Signed-off-by: NMeenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Fixed whitespace errors]
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>

The sandbox is built with the SDL2 library with invokes the X11 library
which in turn calls getc(). But getc() in glibc is defined as

    int getc(FILE *)

This does not match our definition.

    int getc(void)

The sandbox crashes when called with parameter -l.

Rename our library symbol getc() to getchar().
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Move errata A008109, A008378, 009942 workaround implementation from
compute_fsl_memctl_config_regs() to  fsl_ddr_set_memctl_regs()
and add register write after each workaround implementation.
Signed-off-by: NJaiprakash Singh <Jaiprakash.singh@nxp.com>
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>

Impl. erratum as descibed in errata doc.
Enable A008109 for T1040 and T1024
Signed-off-by: NJoakim Tjernlund <joakim.tjernlund@infinera.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Move this uncommon header out of the common header.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move this uncommon header out of the common header.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move this uncommon header out of the common header.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move this header out of the common header.
Signed-off-by: NSimon Glass <sjg@chromium.org>

We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move this uncommon header out of the common header.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This reverts commit 2a5d5d27.
The commit breaks uboot boot (hang in ddr init)
on many PowerPC boards like P3041DS, P4080DS
Signed-off-by: NBiwen Li <biwen.li@nxp.com>
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>

Some of t1042 boards fails DDR init with an Automatic calibration error
every now and then. Investigations revealed that true Warm boots
never failed. Warm boots has some extra steps performed, one being
to start DDRC in Self Refresh and then clearing SR right after.
Applying this SR method unconditionally made all our boards
stable again, regardless of Cold/Warm boot.
Signed-off-by: NJoakim Tjernlund <joakim.tjernlund@infinera.com>
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>

add DM_I2C support for this driver.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C
API when DM_I2C is used. When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch solves
the problem that the i2c-related api of the lx2160a platform does not
support dm.
Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Move this function over to the new header file.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

CONFIG_SYS_DDR_SDRAM_BASE is set to the same value as
CONFIG_SYS_SDRAM_BASE on all existing boards. Just use
CONFIG_SYS_SDRAM_BASE instead.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Moves below DDR specific defines to Kconfig:

CONFIG_FSL_DDR_BIST
CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
CONFIG_FSL_DDR_INTERACTIVE
CONFIG_FSL_DDR_SYNC_REFRESH
Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

fsl_ddr_board_options is generally defined in board
board's ddr.c, but some boards like lx2160ardb board
does not need this function.
Defining fsl_ddr_board_options as weak function to
resolve compilation errors for such boards.
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>
[PK: Fix checkpatch warnings]
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

LX2160A Soc is based on Layerscape Chassis Generation 3.2
architecture with features:
 16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC,
 2 64-bit DDR4 memory controller, RGMII, 8 I2C controllers,
 3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs,
 4 TZASC instances, etc.

SoC personalites:
LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs
LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs
Signed-off-by: NBao Xiaowei <xiaowei.bao@nxp.com>
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: NMeenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: NVabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: NSriram Dash <sriram.dash@nxp.com>
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Pass an empty buffer instead of NULL if the hwconfig environment
variable isn't set.
Signed-off-by: NJeremy Gebben <jgebben@sweptlaser.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: York Sun <york.sun@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: NTom Rini <trini@konsulko.com>

We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.
Signed-off-by: NTom Rini <trini@konsulko.com>

Upon further review, not all code authors are in favour of this change.
This reverts commit ee3556bc.
Signed-off-by: NTom Rini <trini@konsulko.com>

To make this driver easier to be reused, dual-license DDR driver.
Signed-off-by: NYork Sun <york.sun@nxp.com>
CC: Simon Glass <sjg@chromium.org>
CC: Tom Rini <trini@konsulko.com>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Thomas Schaefer <thomas.schaefer@kontron.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Robert P. J. Day <rpjday@crashcourse.ca>
CC: Alexander Merkle <alexander.merkle@lauterbach.com>
CC: Joakim Tjernlund <joakim.tjernlund@transmode.se>
CC: Curt Brune <curt@cumulusnetworks.com>
CC: Valentin Longchamp <valentin.longchamp@keymile.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Ira W. Snyder <iws@ovro.caltech.edu>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Kyle Moffett <Kyle.D.Moffett@boeing.com>
CC: Sebastien Carlier <sebastien.carlier@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Variable "row_density" is no longer used. Drop it from DIMM structure.
Signed-off-by: NYork Sun <york.sun@nxp.com>

DDR controllers always use binding register to determine the memory
space to perform data initialization. In case of controller interleaving,
the space is doubled, resulting twice long wait. It wasn't too bad until
the memory capacity increases. To reduce the wait time, reduce the
binding space to half and restore it after data initialization.
Three-way interleaving is no longer used and is removed.
Signed-off-by: NYork Sun <york.sun@nxp.com>

DDR4 RDIMM has some information in SPD to be used to calculate the
control words for register chip. The rest can be found from JEDEC
spec DDR4RCD02.
Signed-off-by: NYork Sun <york.sun@nxp.com>

On top of RDIMM support, add new register calculation to support
3DS RDIMMs. Only symmetrical 3DS is supported at this time.
Signed-off-by: NYork Sun <york.sun@nxp.com>

Wrong field was masked in this workaround due to wrong endianness. The
impacted SoCs have big-endian.
Signed-off-by: NYork Sun <york.sun@nxp.com>

For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.
Signed-off-by: NYork Sun <york.sun@nxp.com>

Sets DDR configuration parameter cdr1 before all other settings
to support case 0.9v VDD is enabled for some SoCs
Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

LS1088A is compliant with the Layerscape Chassis Generation 3 with
eight ARM v8 Cortex-A53 cores in 2 cluster, CCI-400, one 64-bit DDR4
SDRAM memory controller with ECC, Data path acceleration architecture
2.0 (DPAA2), Ethernet interfaces (SGMIIs, RGMIIs, QSGMIIs, XFIs),
QSPI, IFC, PCIe, SATA, USB, SDXC, DUARTs etc.
Signed-off-by: NAlison Wang <alison.wang@nxp.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: NRaghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: NShaohui Xie <Shaohui.Xie@nxp.com>
[YS: Revised commit message]
Reviewed-by: NYork Sun <york.sun@nxp.com>

We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.

Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.
Suggested-by: NWolfgang Denk <wd@denx.de>
Signed-off-by: NSimon Glass <sjg@chromium.org>