common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.
Signed-off-by: NSimon Glass <sjg@chromium.org>

arch/arc/include/asm/arcregs.h

@@ -109,6 +109,8 @@
 #define ARC_AUX_SUBSYS_BUILD	0xF0
 
 #ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+
 /* Accessors for auxiliary registers */
 #define read_aux_reg(reg)	__builtin_arc_lr(reg)
 

arch/arc/lib/cache.c

@@ -6,6 +6,7 @@
 #include <config.h>
 #include <common.h>
 #include <cpu_func.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
 #include <linux/kernel.h>
 #include <linux/log2.h>

arch/arc/lib/cpu.c

@@ -9,6 +9,7 @@
 #include <vsprintf.h>
 #include <asm/arcregs.h>
 #include <asm/cache.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

arch/arm/cpu/armv7/mpu_v7r.c

@@ -12,6 +12,7 @@
 #include <asm/armv7.h>
 #include <asm/system.h>
 #include <asm/barriers.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
 
 #include <asm/armv7_mpu.h>

arch/arm/cpu/armv7m/cache.c

@@ -11,6 +11,7 @@
 #include <asm/armv7m.h>
 #include <asm/cache.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 /* Cache maintenance operation registers */
 

arch/arm/cpu/armv7m/systick-timer.c

@@ -25,6 +25,7 @@
 #include <init.h>
 #include <time.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c

@@ -8,6 +8,7 @@
 #include <env.h>
 #include <log.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/fsl_serdes.h>

arch/arm/cpu/armv8/generic_timer.c

@@ -9,6 +9,7 @@
 #include <command.h>
 #include <time.h>
 #include <asm/system.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

arch/arm/cpu/armv8/hisilicon/pinmux.c

@@ -10,6 +10,7 @@
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/pinmux.h>
+#include <linux/bitops.h>
 
 struct hi6220_pinmux0_regs *pmx0 =
 	(struct hi6220_pinmux0_regs *)HI6220_PINMUX0_BASE;

arch/arm/cpu/armv8/s32v234/cpu.c

@@ -12,6 +12,7 @@
 #include <asm/armv8/mmu.h>
 #include <asm/io.h>
 #include <asm/arch/mc_me_regs.h>
+#include <linux/bitops.h>
 #include "cpu.h"
 
 u32 cpu_mask(void)

arch/arm/include/asm/arch-am33xx/cpu.h

@@ -12,6 +12,7 @@
 
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>
+#include <linux/bitops.h>
 #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
 
 #include <asm/arch/hardware.h>

arch/arm/include/asm/arch-am33xx/hardware_am43xx.h

@@ -10,6 +10,10 @@
 #ifndef __AM43XX_HARDWARE_AM43XX_H
 #define __AM43XX_HARDWARE_AM43XX_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /* Module base addresses */
 
 /* L3 Fast Configuration Bandwidth Limiter Base Address */

arch/arm/include/asm/arch-fsl-layerscape/config.h

@@ -10,6 +10,10 @@
 #include <linux/kconfig.h>
 #include <fsl_ddrc_version.h>
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define CONFIG_STANDALONE_LOAD_ADDR	0x80300000
 
 /*

arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h

@@ -7,6 +7,9 @@
 #define __ARCH_FSL_LSCH2_IMMAP_H__
 
 #include <fsl_immap.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 #define CONFIG_SYS_IMMR				0x01000000
 #define CONFIG_SYS_DCSRBAR			0x20000000

arch/arm/include/asm/arch-hi3660/hi3660.h

@@ -7,6 +7,10 @@
 #ifndef __HI3660_H__
 #define __HI3660_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define HI3660_UART6_BASE			0xfff32000
 
 #define PMU_REG_BASE                            0xfff34000

arch/arm/include/asm/arch-imx8/iomux.h

@@ -6,6 +6,10 @@
 #ifndef __ASM_ARCH_IMX8_IOMUX_H__
 #define __ASM_ARCH_IMX8_IOMUX_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /*
  * We use 64bits value for iomux settings.
  * High 32bits are used for padring register value,

arch/arm/include/asm/arch-imx8m/clock_imx8mm.h

@@ -8,6 +8,10 @@
 #ifndef _ASM_ARCH_IMX8MM_CLOCK_H
 #define _ASM_ARCH_IMX8MM_CLOCK_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define PLL_1443X_RATE(_rate, _m, _p, _s, _k)			\
 	{							\
 		.rate	=	(_rate),			\

arch/arm/include/asm/arch-imx8m/clock_imx8mq.h

@@ -8,6 +8,10 @@
 #ifndef _ASM_ARCH_IMX8M_CLOCK_H
 #define _ASM_ARCH_IMX8M_CLOCK_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 enum pll_clocks {
 	ANATOP_ARM_PLL,
 	ANATOP_GPU_PLL,

arch/arm/include/asm/arch-meson/axg.h

@@ -7,6 +7,10 @@
 #ifndef __AXG_H__
 #define __AXG_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define AXG_AOBUS_BASE		0xff800000
 #define AXG_PERIPHS_BASE	0xff634400
 #define AXG_HIU_BASE		0xff63c000

arch/arm/include/asm/arch-meson/g12a.h

@@ -7,6 +7,10 @@
 #ifndef __G12A_H__
 #define __G12A_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define G12A_AOBUS_BASE			0xff800000
 #define G12A_PERIPHS_BASE		0xff634400
 #define G12A_HIU_BASE			0xff63c000

arch/arm/include/asm/arch-meson/gx.h

@@ -6,6 +6,10 @@
 #ifndef __GX_H__
 #define __GX_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define GX_FIRMWARE_MEM_SIZE	0x1000000
 
 #define GX_AOBUS_BASE		0xc8100000

arch/arm/include/asm/arch-meson/sd_emmc.h

@@ -7,6 +7,10 @@
 #define __SD_EMMC_H__
 
 #include <mmc.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 
 #define SDIO_PORT_A			0
 #define SDIO_PORT_B			1

arch/arm/include/asm/arch-mx6/imx-regs.h

@@ -372,6 +372,7 @@
 #include <asm/mach-imx/regs-lcdif.h>
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 /* only for i.MX6SX/UL */
 #define WDOG3_BASE_ADDR (((is_mx6ul() || is_mx6ull()) ?	\

arch/arm/include/asm/arch-mx7/imx-regs.h

@@ -225,6 +225,7 @@
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/mach-imx/regs-lcdif.h>
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 extern void imx_get_mac_from_fuse(int dev_id, unsigned char *mac);
 

arch/arm/include/asm/arch-mx7/mx7-ddr.h

@@ -10,6 +10,10 @@
 #ifndef __ASM_ARCH_MX7_DDR_H__
 #define __ASM_ARCH_MX7_DDR_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /* DDRC Registers (DDRC_IPS_BASE_ADDR) */
 struct ddrc {
 	u32 mstr;		/* 0x0000 */

arch/arm/include/asm/arch-rockchip/cru.h

@@ -7,6 +7,10 @@
 #ifndef _ROCKCHIP_CLOCK_H
 #define _ROCKCHIP_CLOCK_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #if defined(CONFIG_ROCKCHIP_RK3288)
 # include <asm/arch-rockchip/cru_rk3288.h>
 #elif defined(CONFIG_ROCKCHIP_RK3399)

arch/arm/include/asm/arch-rockchip/cru_rk3128.h

@@ -6,6 +6,10 @@
 #ifndef _ASM_ARCH_CRU_RK3128_H
 #define _ASM_ARCH_CRU_RK3128_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define MHz		1000000
 #define OSC_HZ		(24 * MHz)
 

arch/arm/include/asm/arch-rockchip/cru_rk3368.h

@@ -6,6 +6,10 @@
 #ifndef _ASM_ARCH_CRU_RK3368_H
 #define _ASM_ARCH_CRU_RK3368_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /* RK3368 clock numbers */
 enum rk3368_pll_id {
 	APLLB,

arch/arm/include/asm/arch-rockchip/cru_rv1108.h

@@ -6,6 +6,10 @@
 #ifndef _ASM_ARCH_CRU_RV1108_H
 #define _ASM_ARCH_CRU_RV1108_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define OSC_HZ		(24 * 1000 * 1000)
 
 #define APLL_HZ		(600 * 1000000)

arch/arm/include/asm/arch-rockchip/ddr_rk3368.h

@@ -6,6 +6,10 @@
 #ifndef __ASM_ARCH_DDR_RK3368_H__
 #define __ASM_ARCH_DDR_RK3368_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /*
  * The RK3368 DDR PCTL differs from the incarnation in the RK3288 only
  * in a few details. Most notably, it has an additional field to track

arch/arm/include/asm/arch-rockchip/grf_rk3368.h

@@ -6,6 +6,10 @@
 #ifndef _ASM_ARCH_GRF_RK3368_H
 #define _ASM_ARCH_GRF_RK3368_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct rk3368_grf {
 	u32 gpio1a_iomux;
 	u32 gpio1b_iomux;

arch/arm/include/asm/arch-rockchip/lvds_rk3288.h

@@ -6,6 +6,10 @@
 #ifndef _ASM_ARCH_LVDS_RK3288_H
 #define _ASM_ARCH_LVDS_RK3288_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define RK3288_LVDS_CH0_REG0			0x00
 #define RK3288_LVDS_CH0_REG0_LVDS_EN		BIT(7)
 #define RK3288_LVDS_CH0_REG0_TTL_EN		BIT(6)

arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h

@@ -7,6 +7,10 @@
 #define _ASM_ARCH_SDRAM_PCTL_PX30_H
 #include <asm/arch-rockchip/sdram_common.h>
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct ddr_pctl_regs {
 	u32 pctl[30][2];
 };

arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h

@@ -8,6 +8,10 @@
 #include <asm/arch-rockchip/sdram_common.h>
 #include <asm/arch-rockchip/sdram_phy_ron_rtt_px30.h>
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct ddr_phy_regs {
 	u32 phy[5][2];
 };

arch/arm/include/asm/arch-rockchip/sdram_rk322x.h

@@ -5,6 +5,10 @@
 #ifndef _ASM_ARCH_SDRAM_RK322X_H
 #define _ASM_ARCH_SDRAM_RK322X_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct rk322x_sdram_channel {
 	/*
 	 * bit width in address, eg:

arch/arm/include/asm/arch-rockchip/sdram_rk3399.h

@@ -7,6 +7,9 @@
 #define _ASM_ARCH_SDRAM_RK3399_H
 #include <asm/arch-rockchip/sdram_common.h>
 #include <asm/arch-rockchip/sdram_msch.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 struct rk3399_ddr_pctl_regs {
 	u32 denali_ctl[332];

arch/arm/include/asm/arch-stih410/sdhci.h

@@ -7,6 +7,10 @@
 #ifndef __STI_SDHCI_H__
 #define __STI_SDHCI_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define FLASHSS_MMC_CORE_CONFIG_1			0x400
 #define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ	BIT(24)
 #define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN	BIT(12)

arch/arm/include/asm/arch-stm32f4/stm32_pwr.h

@@ -5,6 +5,11 @@
  */
 
 #ifndef __STM32_PWR_H_
+#define __STM32_PWR_H_
+
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 /*
  * Offsets of some PWR registers

arch/arm/include/asm/arch-stm32f7/stm32_pwr.h

@@ -5,6 +5,11 @@
  */
 
 #ifndef __STM32_PWR_H_
+#define __STM32_PWR_H_
+
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 /*
  * Offsets of some PWR registers

arch/arm/include/asm/arch-stm32f7/syscfg.h

@@ -7,6 +7,10 @@
 #ifndef _STM32_SYSCFG_H
 #define _STM32_SYSCFG_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct stm32_syscfg_regs {
 	u32 memrmp;
 	u32 pmc;

arch/arm/include/asm/arch-sunxi/ccu.h

@@ -7,6 +7,10 @@
 #ifndef _ASM_ARCH_CCU_H
 #define _ASM_ARCH_CCU_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /**
  * enum ccu_flags - ccu clock/reset flags
  *

arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h

@@ -9,6 +9,10 @@
 #ifndef _SUNXI_CLOCK_SUN50I_H6_H
 #define _SUNXI_CLOCK_SUN50I_H6_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct sunxi_ccm_reg {
 	u32 pll1_cfg;		/* 0x000 pll1 (cpux) control */
 	u8 reserved_0x004[12];

arch/arm/include/asm/arch-sunxi/clock_sun9i.h

@@ -8,6 +8,10 @@
 #ifndef _SUNXI_CLOCK_SUN9I_H
 #define _SUNXI_CLOCK_SUN9I_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct sunxi_ccm_reg {
 	u32 pll1_c0_cfg;	/* 0x00 c0cpu# pll configuration */
 	u32 pll2_c1_cfg;	/* 0x04 c1cpu# pll configuration */

arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h

@@ -10,6 +10,9 @@
 #define _SUNXI_DRAM_SUN50I_H6_H
 
 #include <stdbool.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 enum sunxi_dram_type {
 	SUNXI_DRAM_TYPE_DDR3 = 3,

arch/arm/include/asm/arch-sunxi/dram_sun6i.h

@@ -13,6 +13,10 @@
 #ifndef _SUNXI_DRAM_SUN6I_H
 #define _SUNXI_DRAM_SUN6I_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct sunxi_mctl_com_reg {
 	u32 cr;			/* 0x00 */
 	u32 ccr;		/* 0x04 controller configuration register */

arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h

@@ -11,6 +11,10 @@
 #ifndef _SUNXI_DRAM_SUN8I_A33_H
 #define _SUNXI_DRAM_SUN8I_A33_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct sunxi_mctl_com_reg {
 	u32 cr;			/* 0x00 */
 	u32 ccr;		/* 0x04 controller configuration register */

arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h

@@ -11,6 +11,10 @@
 #ifndef _SUNXI_DRAM_SUN8I_A83T_H
 #define _SUNXI_DRAM_SUN8I_A83T_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct sunxi_mctl_com_reg {
 	u32 cr;			/* 0x00 */
 	u32 ccr;		/* 0x04 controller configuration register */

arch/arm/include/asm/arch-sunxi/dram_sun9i.h

@@ -11,6 +11,10 @@
 #ifndef _SUNXI_DRAM_SUN9I_H
 #define _SUNXI_DRAM_SUN9I_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct sunxi_mctl_com_reg {
 	u32 cr;			/* 0x00 */
 	u32 ccr;		/* 0x04 controller configuration register */

arch/arm/include/asm/arch-sunxi/pwm.h

@@ -6,6 +6,10 @@
 #ifndef _SUNXI_PWM_H
 #define _SUNXI_PWM_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define SUNXI_PWM_CTRL_REG		(SUNXI_PWM_BASE + 0)
 #define SUNXI_PWM_CH0_PERIOD		(SUNXI_PWM_BASE + 4)
 

arch/arm/include/asm/arch-tegra/dc.h

@@ -7,6 +7,10 @@
 #ifndef __ASM_ARCH_TEGRA_DC_H
 #define __ASM_ARCH_TEGRA_DC_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /* Register definitions for the Tegra display controller */
 
 /* CMD register 0x000 ~ 0x43 */

arch/arm/include/asm/arch-tegra/pmc.h

@@ -7,6 +7,10 @@
 #ifndef _PMC_H_
 #define _PMC_H_
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /* Power Management Controller (APBDEV_PMC_) registers */
 struct pmc_ctlr {
 	uint pmc_cntrl;			/* _CNTRL_0, offset 00 */

arch/arm/include/asm/arch-tegra124/flow.h

@@ -7,6 +7,10 @@
 #ifndef _TEGRA124_FLOW_H_
 #define _TEGRA124_FLOW_H_
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct flow_ctlr {
 	u32 halt_cpu_events;	/* offset 0x00 */
 	u32 halt_cop_events;	/* offset 0x04 */

arch/arm/include/asm/arch-vf610/imx-regs.h

@@ -302,6 +302,7 @@
 
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 /* System Reset Controller (SRC) */
 struct src {

arch/arm/include/asm/armv7_mpu.h

@@ -7,6 +7,10 @@
 #ifndef _ASM_ARMV7_MPU_H
 #define _ASM_ARMV7_MPU_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #ifdef CONFIG_CPU_V7M
 #define AP_SHIFT			24
 #define XN_SHIFT			28

arch/arm/include/asm/bitops.h

@@ -16,9 +16,15 @@
 #define __ASM_ARM_BITOPS_H
 
 #include <asm-generic/bitops/__ffs.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/fls64.h>
 
 #ifdef __KERNEL__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 #include <asm/proc-armv/system.h>
 
 #define smp_mb__before_clear_bit()	do { } while (0)
@@ -176,8 +182,4 @@ found_middle:
 
 #endif /* __KERNEL__ */
 
-#include <asm-generic/bitops/__fls.h>
-#include <asm-generic/bitops/fls.h>
-#include <asm-generic/bitops/fls64.h>
-
 #endif /* _ARM_BITOPS_H */

arch/arm/include/asm/gic-v3.h

@@ -6,6 +6,10 @@
 #ifndef __GIC_V3_H__
 #define __GIC_V3_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define GICR_CTLR_ENABLE_LPIS		BIT(0)
 #define GICR_CTLR_RWP			BIT(3)
 

arch/arm/include/asm/omap_mmc.h

@@ -26,6 +26,9 @@
 #define OMAP_MMC_H_
 
 #include <mmc.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 struct hsmmc {
 #ifndef CONFIG_OMAP34XX

arch/arm/include/asm/psci.h

@@ -100,6 +100,7 @@
 
 #ifndef __ASSEMBLY__
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 /* These 3 helper functions assume cpu < CONFIG_ARMV7_PSCI_NR_CPUS */
 u32 psci_get_target_pc(int cpu);

arch/arm/include/asm/ti-common/keystone_net.h

@@ -11,6 +11,9 @@
 
 #include <asm/io.h>
 #include <phy.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 /* EMAC */
 #ifdef CONFIG_KSNET_NETCP_V1_0

arch/arm/include/asm/ti-common/omap_wdt.h

@@ -10,6 +10,10 @@
 #ifndef __OMAP_WDT_H__
 #define __OMAP_WDT_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /*
  * Watchdog:
  * Using the prescaler, the OMAP watchdog could go for many

arch/arm/include/asm/ti-common/ti-edma3.h

@@ -9,6 +9,9 @@
 #ifndef _EDMA3_H_
 #define _EDMA3_H_
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 #include <linux/stddef.h>
 
 #define EDMA3_PARSET_NULL_LINK			0xffff

arch/arm/lib/gic-v3-its.c

@@ -6,6 +6,7 @@
 #include <asm/gic.h>
 #include <asm/gic-v3.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/sizes.h>
 
 static u32 lpi_id_bits;

arch/arm/lib/image.c

@@ -7,6 +7,7 @@
 #include <common.h>
 #include <image.h>
 #include <mapmem.h>
+#include <linux/bitops.h>
 #include <linux/sizes.h>
 
 DECLARE_GLOBAL_DATA_PTR;

arch/arm/mach-at91/include/mach/at91_pmc.h

@@ -24,6 +24,7 @@
 #else
 
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 typedef struct at91_pmc {
 	u32	scer;		/* 0x00 System Clock Enable Register */

arch/arm/mach-at91/include/mach/at91_sfr.h

@@ -9,6 +9,7 @@
 #ifndef __AT91_SFR_H
 #define __AT91_SFR_H
 
+#include <linux/bitops.h>
 struct atmel_sfr {
 	u32 reserved1;	/* 0x00 */
 	union {

arch/arm/mach-at91/include/mach/atmel_pio4.h

@@ -9,6 +9,7 @@
 
 #ifndef __ASSEMBLY__
 
+#include <linux/bitops.h>
 struct atmel_pio4_port {
 	u32 mskr;		/* 0x00 PIO Mask Register */
 	u32 cfgr;		/* 0x04 PIO Configuration Register */

arch/arm/mach-exynos/include/mach/clock.h

@@ -8,6 +8,7 @@
 #define __ASM_ARM_ARCH_CLOCK_H_
 
 #ifndef __ASSEMBLY__
+#include <linux/bitops.h>
 struct exynos4_clock {
 	unsigned char	res1[0x4200];
 	unsigned int	src_leftbus;

arch/arm/mach-imx/imx8m/clock_imx8mm.c

@@ -12,6 +12,7 @@
 #include <asm/io.h>
 #include <div64.h>
 #include <errno.h>
+#include <linux/bitops.h>
 #include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;

arch/arm/mach-imx/imx8m/soc.c

@@ -22,6 +22,7 @@
 #include <fdt_support.h>
 #include <fsl_wdog.h>
 #include <imx_sip.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

arch/arm/mach-imx/imxrt/soc.c

@@ -8,6 +8,7 @@
 #include <init.h>
 #include <asm/io.h>
 #include <asm/armv7_mpu.h>
+#include <linux/bitops.h>
 
 int arch_cpu_init(void)
 {

arch/arm/mach-imx/mx7ulp/soc.c

@@ -13,6 +13,7 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/boot_mode.h>
 #include <asm/mach-imx/hab.h>
+#include <linux/bitops.h>
 
 #define PMC0_BASE_ADDR		0x410a1000
 #define PMC0_CTRL		0x28

arch/arm/mach-k3/include/mach/am6_hardware.h

@@ -8,6 +8,9 @@
 #define __ASM_ARCH_AM6_HARDWARE_H
 
 #include <config.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 #define CTRL_MMR0_BASE					0x00100000
 #define CTRLMMR_MAIN_DEVSTAT				(CTRL_MMR0_BASE + 0x30)

arch/arm/mach-k3/include/mach/j721e_hardware.h

@@ -8,6 +8,9 @@
 #define __ASM_ARCH_J721E_HARDWARE_H
 
 #include <config.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 #define CTRL_MMR0_BASE					0x00100000
 #define CTRLMMR_MAIN_DEVSTAT				(CTRL_MMR0_BASE + 0x30)

arch/arm/mach-k3/include/mach/j721e_spl.h

@@ -7,6 +7,7 @@
 #define _ASM_ARCH_J721E_SPL_H_
 
 /* With BootMode B = 0 */
+#include <linux/bitops.h>
 #define BOOT_DEVICE_HYPERFLASH		0x00
 #define BOOT_DEVICE_OSPI		0x01
 #define BOOT_DEVICE_QSPI		0x02

arch/arm/mach-keystone/clock.c

@@ -9,6 +9,7 @@
 #include <common.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/clock_defs.h>
+#include <linux/bitops.h>
 
 /* DEV and ARM speed definitions as specified in DEVSPEED register */
 int __weak speeds[DEVSPEED_NUMSPDS] = {

arch/arm/mach-keystone/include/mach/clock_defs.h

@@ -9,6 +9,9 @@
 #define _CLOCK_DEFS_H_
 
 #include <asm/arch/hardware.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 /* PLL Control Registers */
 struct pllctl_regs {

arch/arm/mach-keystone/include/mach/hardware-k2hk.h

@@ -9,6 +9,10 @@
 #ifndef __ASM_ARCH_HARDWARE_K2HK_H
 #define __ASM_ARCH_HARDWARE_K2HK_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define KS2_ARM_PLL_EN			BIT(13)
 
 /* PA SS Registers */

arch/arm/mach-keystone/include/mach/hardware-k2l.h

@@ -9,6 +9,10 @@
 #ifndef __ASM_ARCH_HARDWARE_K2L_H
 #define __ASM_ARCH_HARDWARE_K2L_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define KS2_ARM_PLL_EN			BIT(13)
 
 /* PA SS Registers */

arch/arm/mach-keystone/include/mach/hardware.h

@@ -11,6 +11,7 @@
 #include <config.h>
 
 #ifndef __ASSEMBLY__
+#include <linux/bitops.h>
 
 #include <linux/sizes.h>
 #include <asm/io.h>

arch/arm/mach-keystone/include/mach/xhci-keystone.h

@@ -6,6 +6,10 @@
  *     Texas Instruments Incorporated, <www.ti.com>
  */
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define USB3_PHY_REF_SSP_EN		BIT(29)
 #define USB3_PHY_OTG_VBUSVLDECTSEL	BIT(16)
 

arch/arm/mach-keystone/init.c

@@ -16,6 +16,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/psc_defs.h>
+#include <linux/bitops.h>
 
 #define MAX_PCI_PORTS		2
 enum pci_mode	{

arch/arm/mach-mediatek/mt7629/init.c

@@ -14,6 +14,7 @@
 #include <asm/arch/misc.h>
 #include <asm/sections.h>
 #include <dm/uclass.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 
 #include <dt-bindings/clock/mt7629-clk.h>

arch/arm/mach-meson/board-info.c

@@ -11,6 +11,7 @@
 #include <linux/bitfield.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 
 #define AO_SEC_SD_CFG8		0xe0

arch/arm/mach-meson/sm.c

@@ -12,6 +12,7 @@
 #include <asm/arch/sm.h>
 #include <asm/cache.h>
 #include <asm/ptrace.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
 #include <dm.h>

arch/arm/mach-mvebu/armada3700/cpu.c

@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <fdtdec.h>
 #include <init.h>
+#include <linux/bitops.h>
 #include <linux/libfdt.h>
 #include <asm/io.h>
 #include <asm/system.h>

arch/arm/mach-mvebu/cpu.c

@@ -7,6 +7,7 @@
 #include <ahci.h>
 #include <cpu_func.h>
 #include <init.h>
+#include <linux/bitops.h>
 #include <linux/delay.h>
 #include <linux/mbus.h>
 #include <asm/io.h>

arch/arm/mach-mvebu/efuse.c

@@ -10,6 +10,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/efuse.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
 #include <linux/delay.h>
 #include <linux/mbus.h>
 

arch/arm/mach-mvebu/include/mach/soc.h

@@ -10,6 +10,10 @@
 #ifndef _MVEBU_SOC_H
 #define _MVEBU_SOC_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define SOC_MV78230_ID		0x7823
 #define SOC_MV78260_ID		0x7826
 #define SOC_MV78460_ID		0x7846

arch/arm/mach-mvebu/mbus.c

@@ -48,6 +48,7 @@
 
 #include <common.h>
 #include <malloc.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>

arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c

@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
 #include <linux/delay.h>
 
 #include "ctrl_pex.h"

arch/arm/mach-mvebu/timer.c

@@ -10,6 +10,7 @@
 #include <init.h>
 #include <asm/io.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
 
 #define TIMER_LOAD_VAL			0xffffffff
 

arch/arm/mach-omap2/abb.c

@@ -13,6 +13,7 @@
 #include <asm/arch/clock.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/bitops.h>
 
 __weak s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)
 {

arch/arm/mach-omap2/am33xx/clock_ti816x.c

@@ -27,6 +27,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #include <asm/emif.h>
 

arch/arm/mach-omap2/omap5/abb.c

@@ -11,6 +11,7 @@
 #include <common.h>
 #include <asm/omap_common.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 /*
  * Setup LDOVBB for OMAP5.

arch/arm/mach-omap2/pipe3-phy.c

@@ -11,6 +11,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/delay.h>
 #include <linux/errno.h>
 #include "pipe3-phy.h"

arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h

@@ -79,6 +79,7 @@
 
 #ifndef __ASSEMBLY__
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 /* RWDT */
 struct rcar_rwdt {

arch/arm/mach-rmobile/include/mach/sh_sdhi.h

@@ -11,6 +11,7 @@
 #ifndef _SH_SDHI_H
 #define _SH_SDHI_H
 
+#include <linux/bitops.h>
 #define SDHI_CMD			(0x0000 >> 1)
 #define SDHI_PORTSEL			(0x0004 >> 1)
 #define SDHI_ARG0			(0x0008 >> 1)

arch/arm/mach-rockchip/rk3308/rk3308.c

@@ -10,6 +10,7 @@
 #include <asm/arch-rockchip/hardware.h>
 #include <asm/gpio.h>
 #include <debug_uart.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

arch/arm/mach-rockchip/rk3368/rk3368.c

@@ -14,6 +14,7 @@
 #include <asm/arch-rockchip/cru_rk3368.h>
 #include <asm/arch-rockchip/grf_rk3368.h>
 #include <asm/arch-rockchip/hardware.h>
+#include <linux/bitops.h>
 #include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;

arch/arm/mach-rockchip/rk3399/rk3399.c

@@ -17,6 +17,7 @@
 #include <asm/arch-rockchip/gpio.h>
 #include <asm/arch-rockchip/grf_rk3399.h>
 #include <asm/arch-rockchip/hardware.h>
+#include <linux/bitops.h>
 #include <power/regulator.h>
 
 DECLARE_GLOBAL_DATA_PTR;