This new command supports hashing SHA1 and SHA256. It could be extended
to others such as MD5 and the CRC algorithms. The syntax is modeled on
those:

   hash <algorithm> <address> <length> [*<dest_addr> | <dest_envvar>]

to calculate a hash, and:

   hash -v <algorithm> <address> <length> [*<verify_addr> | <verify_envvar>]

to verify a hash.

Use CONFIG_CMD_HASH to enable the command, CONFIG_SHA1 to enable SHA1 and
CONFIG_SHA256 to enable SHA256.

The existing sha1sum command remains.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Sometimes data is on a block device and within a partition, but not in a
particular filesystem.

This commands permits reading raw data from a partition.
Signed-off-by: NKenneth Waters <kwaters@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>

Gettime returns the current timer value.  If CONFIG_SYS_HZ is defined
then the timer value is also converted to seconds.

Tegra20 (SeaBoard) # gettime
Timer val: 7754
Seconds : 7
Remainder : 754
sys_hz = 1000

There has been some discussion about whether this is useful enough to
be included in U-Boot. The following boards do not have CONFIG_SYS_HZ
defined:

M52277EVB
M52277EVB_stmicro
M53017EVB
M54418TWR
M54418TWR_nand_mii
M54418TWR_nand_rmii
M54418TWR_nand_rmii_lowfreq
M54418TWR_serial_mii
M54418TWR_serial_rmii
Signed-off-by: NAnton Staaf <robotboy@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>

When running from coreboot we don't want this code, so make it
optional.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The default implementation of this function is just memset, but other
implementations will be needed when physical memory isn't accessible by
U-Boot using normal addressing mechanisms.
Signed-off-by: NGabe Black <gabeblack@chromium.org>
Signed-off-by: NChe-Liang Chiou <clchiou@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>

Since the top-level README file refers the reader to the CHANGELOG,
it's worth mentioning how to generate it.
Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca>

We don't want this for coreboot, so provide a way of compiling it out.
Signed-off-by: NGabe Black <gabeblack@chromium.org>
Signed-off-by: NStefan Reinauer <reinauer@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>

When running from coreboot we don't want this code.

This version works by ifdef-ing out all of the code that would go
into those sections and all the code that refers to it. The sections are
then empty, and the linker will either leave them empty for the loader
to ignore or remove them entirely.
Signed-off-by: NGabe Black <gabeblack@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>

Reference nand monitor commands in U-Boot README
Signed-off-by: NKarl O. Pinc <kop@meme.com>

Document parameters used for specifying the NAND image to be loaded.

Also fix the definition of CONFIG_SPL_NAND_SIMPLE -- it's only
nand_spl_simple.c, not the entire nand directory.  The word "simple" is
there for a reason.  :-)
Signed-off-by: NScott Wood <scottwood@freescale.com>
---
v2: updated for makefile changes earlier in patchset

Some small SPLs do not use nand_base.c, and a subset of those also
require a special driver.  Some SPLs need software ECC but others can't
fit it.

All existing boards that specify CONFIG_SPL_NAND_SUPPORT have these
symbols added to preserve existing behavior.
Signed-off-by: NScott Wood <scottwood@freescale.com>
--
v2: use positive logic for including bits of NAND, rather than
a MINIMAL symbol that excludes things.

Introduces CONFIG_SPL_RELOC_TEXT_BASE and CONFIG_SPL_RELOC_STACK.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>

cpu_init_nand.c is renamed to spl_minimal.c as it is not really NAND-specific.
Signed-off-by: NScott Wood <scottwood@freescale.com>
---
v2: factor out START, and change cpu_init_nand.c to spl_minimal.c
Cc: Andy Fleming <afleming@freescale.com>

Currently the SPL target is specified in a CPU-specific makefile
fragment.  While some targets may need something more complicated than a
simple target name, targets which don't need this shouldn't have to provide a makefile fragment just for this.
Signed-off-by: NScott Wood <scottwood@freescale.com>
---
v2: Removed default target as it's been pointed out to me how existing platforms
cause the SPL to be built.

When booting a fit image with multiple configurations, the user either has to
specify which configuration to use explicitly, or there has to be a default
defined which is chosen automatically. This change adds an option to change
that behavior so that a configuration can be selected explicitly, or the
configuration which has the device tree that claims to be compatible with the
earliest item in U-Boot's device tree.

In other words, if U-Boot claimed to be compatible with A, B, and then C, and
the configurations claimed to be compatible with A, D and B, D and D, E, the
first configuration, A, D, would be chosen. Both the first and second
configurations match, but the first one matches a more specific entry in
U-Boot's device tree. The order in the kernel's device tree is ignored.
Signed-off-by: NGabe Black <gabeblack@google.com>

Commit-Ready: Gabe Black <gabeblack@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add support for drawing compressed RLE8 bitmaps.

Reference: http://www.digicamsoft.com/bmp/bmp.htmlSigned-off-by: NChe-Liang Chiou <clchiou@chromium.org>
Signed-off-by: NTom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NChe-Liang Chiou <clchiou@chromium.org>
[agust: fix some minor style issues and build warnings]
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

Add a new function to find out the number of available SCSI disks. Also
set the 'scsidevs' environment variable after each scan.
Signed-off-by: NStefan Reinauer <reinauer@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>

This option is intended to be set by boards which will set the
board_name and board_rev environment variables.  These are to be used
when the U-Boot binary can support more than one board type at run-time
and the user needs an easy way (for example for scripting to determine
what device tree to load) to determine what board they are on.
Signed-off-by: NTom Rini <trini@ti.com>

Add optional support for some ANSI escape sequences to the
cfb_console driver. Define CONFIG_CFB_CONSOLE_ANSI to enable
cursor moving, color reverting and clearing the cfb console
via ANSI escape codes.
Signed-off-by: NPali Rohár <pali.rohar@gmail.com>
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

This makes the FAT and ext4 filesystem implementations build if
CONFIG_FS_{FAT,EXT4} are defined, rather than basing the build on
whether CONFIG_CMD_{FAT,EXT*} are defined. This will allow the
filesystems to be built separately from the filesystem-specific commands
that use them. This paves the way for the creation of filesystem-generic
commands that used the filesystems, without requiring the filesystem-
specific commands.

Minor documentation changes are made for this change.

The new config options are automatically selected by the old config
options to retain backwards-compatibility.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>

These boards have long reached EOL, and there has been no indication
of any active users of such hardware for years.  Get rid of the dead
weight.
Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Wolfgang Grandegger <wg@denx.de>

Move spin table to cached memory to comply with ePAPR v1.1.
Load R3 with 64-bit value if CONFIG_SYS_PPC64 is defined.

'M' bit is set for DDR TLB to maintain cache coherence.

See details in doc/README.mpc85xx-spin-table.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

README : Rename CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111, CONFIG_DRIVER_LAN91C96 to CONFIG_LAN91C96

Rename CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111,
CONFIG_DRIVER_LAN91C96 to CONFIG_LAN91C96
Signed-off-by: NAshok Kumar Reddy <ashokkourla2000@gmail.com>
Reviewed-by: NTom Rini <trini@ti.com>

This change adds CBFS support and some commands to use it to u-boot. These
commands are:

cbfsinit - Initialize CBFS support and pull all metadata into RAM. The end of
the ROM is an optional parameter which defaults to the standard 0xffffffff and
can be used to support multiple CBFSes in a system. The last one set up with
cbfsinit is the one that will be used.

cbfsinfo - Print information from the CBFS header.

cbfsls - Print out the size, type, and name of all the files in the current
CBFS. Recognized types are translated into symbolic names.

cbfsload - Load a file from CBFS into memory. Like the similar command for fat
filesystems, you can optionally provide a maximum size.

Support for CBFS is compiled in when the CONFIG_CMD_CBFS option is specified.

The CBFS driver can also be used programmatically from within u-boot.

If u-boot needs something out of CBFS very early before the heap is
configured, it won't be able to use the normal CBFS support which caches some
information in memory it allocates from the heap. The
cbfs_file_find_uncached function searches a CBFS instance without touching
the heap.
Signed-off-by: NGabe Black <gabeblack@google.com>
Signed-off-by: NStefan Reinauer <reinauer@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>

This adds the required code to set up a ULPI USB port. It is
mostly a port of the Linux ULPI setup code with some tweaks
added for more correctness, discovered along the way of
debugging this.

To use this both CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT
have to be set in the board configuration file.
Signed-off-by: NLucas Stach <dev@lynxeye.de>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>

Two sub-commands... start and get.
 * start sets the reference.
 * get prints out the time since the last start (in "<sec>.<msec>" format).
If get is called without start, returns time since boot.
Simple way to benchmark an operation: "timer start;<commands-to-measure>;timer get"
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>

This allows you to read ini-formatted data from anywhere and then
import one of the sections into the environment

This is based on rev 16 at http://code.google.com/p/inih/Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>

Define the new "-2" value for bootdelay to mean autoboot with no delay
and don't check for an abort key (while "0" value means do check).
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>

Now that there are a few features, add a bootstage command to access them.

bootstage report - prints a report
bootstage stash/unstash - stashes bootstage records in memory, reads them back
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add an option, CONFIG_BOOTSTAGE_FDT to pass boot timings to the kernel
in the device tree, if available. To use this, you must have
CONFIG_OF_LIBFDT defined.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NKarl O. Pinc <kop@meme.com>

Signed-off-by: NLei Wen <leiwen@marvell.com>

Signed-off-by: NPavel Machek <pavel@denx.de>
Signed-off-by: NTom Rini <trini@ti.com>

Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL
framework, enable on all of the previously using boards.  We move the
spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/.  We leave
the NAND one in-place as we plan to replace it later in this series.

We use common/spl to avoid linker problems with respect to merging
constant strings in objects.   Otherwise all strings in common/ will be
linked in and kept which grows SPL in size too much.
Signed-off-by: NTom Rini <trini@ti.com>

Only omap4/5 currently have a meaningful set of display text and overo
had been adding a function to display nothing.  Change how this works to
be opt-in and only turned on for omap4/5 now.
Signed-off-by: NTom Rini <trini@ti.com>

README: Cleanup description of supported partitions.
Signed-off-by: NKarl O. Pinc <kop@meme.com>

Commit 155cb010 replaced the read-only property of the ver env var
with an auto-restoring behavior. Update the README file accordingly.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Wolfgang Denk <wd@denx.de>

Introduce CONFIG_PCI_ENUM_ONLY variable for platforms that just want a
quick enumberation of the PCI devices, but don't need any setup work done.
This is very beneficial on platforms that have u-boot loaded by another
boot loader which does a more sophisticated job of setup of PCI devices
than u-boot.  That way, u-boot can just read what's there and get on
with life.  This is what SeaBIOS does.
Signed-off-by: NAndrew Sharp <andywyse6@gmail.com>

All usage of config_cmd_default.h uses <> for the include statement.
Update the README to do the same, rather than using "".
Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>

Erratum A004510 says that under certain load conditions, modified
cache lines can be discarded, causing data corruption.

To work around this, several CCSR and DCSR register updates need to be
made in a careful manner, so that there is no other transaction in
corenet when the update is made.

The update is made from a locked cacheline, with a delay before to flush
any previous activity, and a delay after to flush the CCSR/DCSR update.
We can't use a readback because that would be another corenet
transaction, which is not allowed.

We lock the subsequent cacheline to prevent it from being fetched while
we're executing the previous cacheline.  It is filled with nops so that a
branch doesn't cause us to fetch another cacheline.

Ordinarily we are running in a cache-inhibited mapping at this point, so
we temporarily change that.  We make it guarded so that we should never
see a speculative load, and we never do an explicit load.  Thus, only the
I-cache should ever fill from this mapping, and we flush/unlock it
afterward.  Thus we should avoid problems from any potential cache
aliasing between inhibited and non-inhibited mappings.

NOTE that if PAMU is used with this patch, it will need to use a
dedicated LAW as described in the erratum.  This is the responsibility
of the OS that sets up PAMU.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>