1. 15 5月, 2012 1 次提交
    • J
      ARM:OMAP+:MMC: Add parameters to MMC init · bbbc1ae9
      Jonathan Solnit 提交于
      Add parameters to the OMAP MMC initialization function so the board can
      mask host capabilities and set the maximum clock frequency.  While the
      OMAP supports a certain set of MMC host capabilities, individual boards
      may be more restricted and the OMAP may need to be configured to match
      the board.  The PRG_SDMMC1_SPEEDCTRL bit in the OMAP3 is an example.
      Signed-off-by: NJonathan Solnit <jsolnit@gmail.com>
      bbbc1ae9
  2. 12 2月, 2012 1 次提交
    • G
      ehci-omap: Clean up added ehci-omap.c · 43b62393
      Govindraj.R 提交于
      Clean up added ehci-omap.c and make it generic for re-use across
      omap-soc having same ehci ip block. Also pass the modes to be configured
      from board file and configure the ports accordingly. All usb layers
      are not cache aligned, till then keep cache off for usb ops as ehci will use
      internally dma for all usb ops.
      
      * Add a generic common header ehci-omap.h having common ip block
        data and reg shifts.
      * Rename and modify ehci-omap3 to ehci.h retain only conflicting
        sysc reg shifts remove others and move to common header file.
      * pass the board data for beagle/panda accordinly to use
        ehci ports.
      Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
      Signed-off-by: NGovindraj.R <govindraj.raja@ti.com>
      43b62393
  3. 20 12月, 2011 1 次提交
  4. 16 11月, 2011 1 次提交
    • S
      omap5: Add minimal support for omap5430. · 508a58fa
      Sricharan 提交于
      This patch adds the minimal support for OMAP5. The platform and machine
      specific headers and sources updated for OMAP5430.
      
      OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture.
      It's a dual core SOC with GIC used for interrupt handling and SCU for cache
      coherency.
      
      Also moved some part of code from the basic platform support that can be made
      common for OMAP4/5. Rest is kept out seperately. The same approach is followed
      for clocks and emif support in the subsequent patches.
      Signed-off-by: Nsricharan <r.sricharan@ti.com>
      Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
      508a58fa
  5. 28 10月, 2011 1 次提交
  6. 03 8月, 2011 1 次提交
    • A
      omap4: cleanup pin mux data · 469ec1e3
      Aneesh V 提交于
      - separate mux settings into essential and non essential parts
      - essential part is board independent as of now(so move it
        to SoC directory). Will help in having single SPL for all
        boards.
      - Non-essential part(the pins not essential for u-boot to function)
        need to be phased out eventually.
      - Correct mux data by aligning to the latest settings in x-loader
      Signed-off-by: NAneesh V <aneesh@ti.com>
      Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
      469ec1e3
  7. 18 10月, 2010 1 次提交
  8. 05 8月, 2010 1 次提交
  9. 16 7月, 2010 1 次提交
  10. 06 7月, 2010 2 次提交
  11. 15 6月, 2010 1 次提交
  12. 16 9月, 2007 1 次提交
  13. 12 2月, 2007 1 次提交
  14. 24 1月, 2007 1 次提交
  15. 01 4月, 2006 1 次提交
  16. 26 9月, 2005 1 次提交
  17. 11 10月, 2004 1 次提交
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  19. 27 8月, 2002 2 次提交
  20. 28 12月, 2000 1 次提交
  21. 14 12月, 2000 1 次提交
  22. 13 11月, 2000 1 次提交