Introduce TPL_CLK to allow finer-grained selection of TPL features
for feature-rich (i.e. DM-based) TPL stages.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

SPL_CLK should also depend on SPL_DM (and not just on CLK).
Add the additional dependency.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

Add clock driver for the RCar Gen3 R8A7795 and R8A7796 SoCs .
This driver allows reading out the clock configuration set by
previous boot stages and enabling and disabling clock using
the MSTP registers. Setting clock is not supported thus far.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

This is a simplified version of linux/arch/mips/bcm63xx/clk.c
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add a clock framework driver for the zynq platform. The driver is based
on the platform zynq clock driver but reworked to use static functions
instead of run-time generated objects even for unused clocks.
Additionally the CONFIG_ZYNQ_PS_CLK_FREQ is replaced by the
ps-clk-frequency from the device tree.
Signed-off-by: NStefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add basic clock driver support for zynqmp which
sets the required clock for GEM controller
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add a simple driver for the clocks provided by the MIPS Boston
development board. The system provides information about 2 clocks whose
rates are fixed by the bitfile flashed in the boards FPGA, and this
driver simply reads the rates of these 2 clocks.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in DT aligned with the Linux's.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP
(Boot and Power Management Processor). This change implements a driver
that does that. A tegra/ sub-directory is created to follow the existing
pattern. It is unconditionally selected by CONFIG_TEGRA186 since virtually
any Tegra186 build of U-Boot will need the feature.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Add a clock driver for Exynos7420 SoC. There are about 25 clock controller
blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks
are added in this initial version of the driver.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This is the initial commit for the UniPhier clock drivers.
Currently, only the Media I/O clock is supported.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Clocks are an important feature of platforms and have become increasing
complex with time. Most modern SoCs have multiple PLLs and dozens of clock
dividers which distribute clocks to on-chip peripherals.

Some SoC implementations have a clock API which is private to that SoC family,
e.g. Tegra and Exynos. This is useful but it would be better to have a
common API that can be understood and used throughout U-Boot.

Add a simple clock API as a starting point. It supports querying and setting
the rate of a clock. Each clock is a device. To reduce memory and processing
overhead the concept of peripheral clocks is provided. These do not need to
be explicit devices - it is possible to write a driver that can adjust the
I2C clock (for example) without an explicit I2C clock device. This can
dramatically reduce the number of devices (and associated overhead) in a
complex SoC.

Clocks are referenced by a number, and it is expected that SoCs will define
that numbering themselves via an enum.
Signed-off-by: NSimon Glass <sjg@chromium.org>