- 06 4月, 2015 9 次提交
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由 Ajay Kumar 提交于
Now that parade driver supports reading SLP and RST GPIO from DT, specify the same in parade DT node. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Ajay Kumar 提交于
Now that the exynos_fb driver supports handling backlight GPIO via DT, specify pwm output property via FIMD DT node. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Ajay Kumar 提交于
Add support to configure EDP_RST GPIO and EDP_SLP GPIO, if provided in parade DT node. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Ajay Kumar 提交于
Add support to configure PWM_OUT(PWM output) GPIO and BL_EN(backlight enable) GPIO, if provided in FIMD DT node. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Ajay Kumar 提交于
The existing setting for rpll_sdiv generates 70.5Mhz RPLL video clock to drive 1366x768 panel on peach_pit. This clock rate is not sufficient to drive 1920x1080 panel on peach-pi. So, we adjust rpll_sdiv to 3 so that it generates 141Mhz pixel clock which can drive peach-pi LCD. This change doesn't break peach-pit LCD since 141/2=70.5Mhz, i.e FIMD divider at IP level will get set to 1(the required divider setting will be calculated and set by exynos_fimd_set_clock()) and hence peach-pit LCD still works fine. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Ajay Kumar 提交于
Add get_lcd_clk and set_lcd_clk callbacks for Exynos5800 needed by exynos video driver. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Sjoerd Simons 提交于
The peach boards have their SDRAM start address at 0x20000000 instead of 0x40000000 which seems common for all other exynos5 based boards. This means the layout set in exynos5-common.h causes the kernel be loaded more then 128MB (at 0x42000000) away from memory start which breaks booting kernels with CONFIG_AUTO_ZRELADDR Define a custom MEM_LAYOUT_ENV_SETTINGS for both peach boards which uses the same offsets from start of memory as the common exynos5 settings. This fixes booting via bootz and PXE Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Inha Song 提交于
We can enable / disable trace feature from the FTRACE config options. To enable, compile U-Boot with FTRACE=1. This patch add #ifdef FTRACE in exynos5-common.h for enable/disable to use FTRACE configs instead of having to change board config files. Signed-off-by: NInha Song <ideal.song@samsung.com> Acked-by: NSimon Glass <sjg@chroimum.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Guillaume GARDET 提交于
Commit 2e82e925 'Exynos: Clock: Cleanup soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow). Changes in V2: reorder lines as requested by Joonyoung Shim. Signed-off-by: NGuillaume GARDET <guillaume.gardet@free.fr> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Joonyoung Shim <jy0922.shim@samsung.com> Reviewed-by: NSimon Glass <sjg@chroimum.org> Tested-by: NSimon Glass <sjg@chroimum.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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- 03 4月, 2015 14 次提交
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git://git.denx.de/u-boot-tegra由 Tom Rini 提交于
Conflicts: board/armltd/vexpress64/vexpress64.c Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Alexey Brodkin 提交于
With the most recent board firmware correct SDIO clock is 50MHz as opposed to 25 MHz before. Also set max frequency of MMC data exchange equal to SDIO clock - because there's no way to transfer data faster than interface clock. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
ARCv2 cores may have built-in SLC (System Level Cache, AKA L2-cache). This change adds functions required for controlling SLC: * slc_enable/disable * slc_flush/invalidate For now we just disable SLC to escape DMA coherency issues until either: * SLC flush/invalidate is supported in DMA APIin U-Boot * hardware DMA coherency is implemented (that might be board specific so probably we'll need to have a separate Kconfig option for controlling SLC explicitly) Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org>
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由 Alexey Brodkin 提交于
Now when all infrastructure in ARC is ready for it let's switch ARC UART to driver model. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org>
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由 Alexey Brodkin 提交于
[1] Fix misspeling in ARC_CACHE_LINE_SHIFT dependency, now cache-line lenth selection is correctly enabled if either I$ or D$ are enabled. [2] Add dummy entry to target list to make sure target type is always mentioned in defconfig. Otherwise defconfig for the first target in the list will not have target name and later on with addition of the new target on top of the list in Kconfig will lead to corrupted configuration expanded from defconfig. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
As discussed on mailing list we're drifting away from CONFIG_SYS_GENERIC_GLOBAL_DATA in favour to use of board_init_f_mem() for global data. So do this for ARC architecture. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
Before that moment our defconfigs were manually modified with addition of new options. That means once anybody wants to add another option and re-genarate defconfig with "make defconfig" there will be lots of differences. So to make future modifications more clean we'll do bulk re-generation right away. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
Intention behind this work was elimination of as much assembly-written code as it is possible. In case of ARC we already have relocation fix-up implemented in C so why don't we use C for U-Boot copying, .bss zeroing etc. It turned out x86 uses pretty similar approach so we re-used parts of code in "board_f.c" initially implemented for x86. Now assembly usage during init is limited to stack- and frame-pointer setup before and after relocation. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org>
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由 Alexey Brodkin 提交于
This separation makes maintenance of code easier because those low-level interrupt- or exception handling routines are pretty static and usually require not much care while start-up code is a subject of modifications and enhancements. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
Even though ARCompact and ARCv2 are not binary compatible most of assembly instructions are used in both. With this change we'll get rid of duplicate code. Still IVTs are implemented differently so we're keeping them in separate files. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
always Make both invalidate_icache_all() and invalidate_dcache_all() available even if U-Boot is configured with CONFIG_SYS_DCACHE_OFF and/or CONFIG_SYS_ICACHE_OFF. This is useful because configuration of U-Boot may not match actual hardware features. Real board may have cache(s) but for some reason we may want to run U-Boot with cache(s) disabled (for example if some peripherals work improperly with existing drivers if data cache is enabled). So board may start with cache(s) enabled (that's the case for ARC cores with built-in caches) but early in U-Boot we disable cache(s) and make sure all contents of data cache gets flushed in RAM. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
Being global variable with 0 value it falls into .bss area which we may only use after relocation to RAM. And right afetr relocation we zero .bss - effectively cleaing register address set for early console. Now with pre-set value "regs" variable is no longer in .bss and this way safely survives relocation. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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- 01 4月, 2015 15 次提交
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Wu, Josh 提交于
Create a new configuration file: at91-sama5_common.h. Which includes the configurations that reused by all SAMA5 chips. at91-sama5_common.h includes: - hw macros (clock, text_base and etc.) - default commands. - BOOTARGS - U-Boot common configs. NOTE: NOR flash definition should be put before including the common header. For sama5d3-xplained: - add CMD_SETEXPR For sama5d3xek: - add CMD_SETEXPR - change CONFIG_SYS_MALLOC_LEN to (4*1024*1024) Signed-off-by: NJosh Wu <josh.wu@atmel.com>
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由 Bo Shen 提交于
Enable SPL support for at91sam9n12ek boards, now it supports boot up from NAND flash, serial flash. Signed-off-by: NBo Shen <voice.shen@atmel.com>
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由 Bo Shen 提交于
Enable SPL support for at91sam9x5ek board. Now, it supports boot up from NAND flash and SPI flash. Signed-off-by: NBo Shen <voice.shen@atmel.com>
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由 Bo Shen 提交于
Supports boot up from NAND flash with software ECC eanbled. And supports boot up from SD/MMC card with FAT file system. As the boot from SD/MMC card with FAT file system, the BSS segment is too big to fit into SRAM, so, use the lds to put it into SDRAM. Signed-off-by: NBo Shen <voice.shen@atmel.com>
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由 Bo Shen 提交于
Config MCKR according to the datasheet sequence, or else it will cause the MCKR configuration failed. Remove timeout checking for clock configuration, if configure the clock failed, let the system hang while not run in wrong clock configuration. Signed-off-by: NBo Shen <voice.shen@atmel.com> Tested-by: NHeiko Schocher <hs@denx.de>
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由 Wu, Josh 提交于
Insteading in mmc's raw sectors, this patch will save the environment in a fat file (uboot.env) in mmc card's first FAT patition by default. If you want to save in mmc's raw sectors, you only need to define CONFIG_ENV_IS_IN_MMC. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Acked-by: NBo Shen <voice.shen@atmel.com>
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由 David Dueck 提交于
Add support for on-flash bad block table. This makes U-Boot handle an existing BBT correctly. Signed-off-by: NDavid Dueck <davidcdueck@googlemail.com> Reviewed-by: NBoris BREZILLON <boris.brezillon@free-electrons.com> CC: Boris BREZILLON <boris.brezillon@free-electrons.com> CC: Josh Wu <josh.wu@atmel.com> CC: Andreas Bießmann <andreas.devel@googlemail.com> CC: Scott Wood <scottwood@freescale.com> Acked-by: NJosh Wu <josh.wu@atmel.com>
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由 Heiko Schocher 提交于
move MACH_TYPE into defconfig Signed-off-by: NHeiko Schocher <hs@denx.de>
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由 Tom Rini 提交于
To facilitate changing lowlevel_init to become s_init, move the current contents of s_init into board_init_f and add the rest of what board_init_f does here. In order to compile clean without CONFIG_SKIP_LOWLEVEL_INIT set, leave an empty stub of s_init(). It can be removed when lowlevel_init becomes s_init. Cc: Bo Shen <voice.shen@atmel.com> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Tested-by: Matt Porter <mporter@konsulko.com> on sama5d3_xplained Signed-off-by: NTom Rini <trini@ti.com> [rebased on current master, leave s_init() as empty stub] Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Bo Shen 提交于
The commit 8dfafdde (Introduce common timer functions), add common timer functions, we can use them directly. Signed-off-by: NBo Shen <voice.shen@atmel.com> [rebase on current master] Sigend-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Bo Shen 提交于
Signed-off-by: NBo Shen <voice.shen@atmel.com> [rebase on current master] Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wu, Josh 提交于
This patch will display the U-Boot version on LCD. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Acked-by: NBo Shen <voice.shen@atmel.com>
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- 31 3月, 2015 2 次提交
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由 Stefan Agner 提交于
Testing showed, that commands like STATUS made the buffer dirty when executed with NFC_SECSZ set to the page size. It looks like the controller transfers bogus data when this register is configured. When setting it to 0, the buffer does not get altered while the status command still seems to work flawless. Signed-off-by: NStefan Agner <stefan@agner.ch>
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