- 30 9月, 2014 1 次提交
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由 Ye.Li 提交于
This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2 shared the same board with i.MX6Q ARM2 board since the i.MX6DL is pin-pin compatible with i.MX6Q. The patch also support the DDR 32-BIT mode option. Please define CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT mode.But due to the board design, it's 64bit DDR buswidth physically, so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it. Signed-off-by: NYe.Li <B37916@freescale.com>
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- 13 1月, 2014 1 次提交
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由 Fabio Estevam 提交于
There is no need to print an error message when cpu_eth_init() fails because net/eth.c already prints it. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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- 18 12月, 2013 1 次提交
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由 Eric Nelson 提交于
This allows the use of either or both declarations from the files mx6q_pins.h and mx6dl_pins.h. All board files should include <asm/arch/mx6-pins.h> with one of the following defined in boards.cfg MX6Q - for boards targeting i.MX6Q or i.MX6D MX6DL - for boards targeting i.MX6DL MX6S - for boards targeting i.MX6S MX6QDL - for boards that support any of the above with run-time detection Pad declarations will be MX6_PAD_x for single-variant boards and MX6Q_PAD_x and MX6DL_PAD_x for boards supporting both processor classes. Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com> Acked-by: NStefano Babic <sbabic@denx.de>
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- 13 11月, 2013 1 次提交
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由 Eric Nelson 提交于
Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>
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- 24 7月, 2013 1 次提交
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: NTom Rini <trini@ti.com>
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- 28 4月, 2013 1 次提交
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由 Benoît Thébaudeau 提交于
PUE requires PKE to mean something, as do pull values with PUE, so do not compell users to explicitly use PKE and PUE everywhere. This is also what is done on Linux and what has already been done for i.MX51. By the way, remove some unused pad control definitions. There is no change of behavior. Note that SPI_PAD_CTRL was defined by several boards with a pull value, but without PKE or PUE, which means that no pull was actually enabled in the pad. This might be a bug in those boards, but this patch does not change the behavior, so it just removes the meaningless pull value from those definitions. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
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- 07 3月, 2013 1 次提交
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由 Eric Nelson 提交于
Rename all i.MX6 pad declarations to MX6_PAD_x, so a board may support either i.MX6Quad/Dual (MX6Q) or i.MX6Dual-Lite/Solo (MX6DL) by including the proper header. Boards mx6qarm2, mx6qsabreauto, mx6qsabrelite, and mx6qsabresd only support MX6Q, so they include mx6q_pins.h. Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>
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- 16 10月, 2012 2 次提交
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由 Eric Nelson 提交于
Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>
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由 Benoît Thébaudeau 提交于
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not suitable for the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). This patch fixes this issue by adding a configuration field for the SDHC input clock frequency. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jason Liu <r64343@freescale.com> Cc: Matt Sealey <matt@genesi-usa.com> Cc: Andy Fleming <afleming@gmail.com>
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- 01 9月, 2012 2 次提交
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由 Benoît Thébaudeau 提交于
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so disable it globally for this architecture. This avoids setting no_snoop for all i.MX boards, and it prevents setting a reserved bit of a reserved register if fsl_esdhc_mmc_init() is used on i.MX, like in arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init(). Since no_snoop was only used on i.MX, get rid of it BTW. Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com>
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由 Ashok Kumar Reddy 提交于
Signed-off-by: NAshok Kumar Reddy <ashokkourla2000@gmail.com> Acked-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NStefano Babic <sbabic@denx.de>
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- 31 7月, 2012 1 次提交
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由 Troy Kisky 提交于
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>
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- 12 2月, 2012 1 次提交
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由 Stefano Babic 提交于
Commit 314284b1 has changed board_mmc_getcd() function prototype, while mx6qarm2 has still the old one. Signed-off-by: NStefano Babic <sbabic@denx.de> CC: Jason Liu <jason.hui@linaro.org> Acked-by: NDirk Behme <dirk.behme@de.bosch.com> Acked-by: NJason Liu <jason.hui@linaro.org> Tested-by: NJason Liu <jason.hui@linaro.org>
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- 16 1月, 2012 1 次提交
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由 Jason Liu 提交于
This enable the network function on the i.mx6q armadillo2 board(arm2), thus we can use tftp to load image from network. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: NJason Liu <jason.hui@linaro.org> Tested-by: NDirk Behme <dirk.behme@de.bosch.com>
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- 10 12月, 2011 1 次提交
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由 Jason Liu 提交于
Add the initial support for Freescale i.MX6Q Armadillo2 board Support: MMC boot from slot 0/1, debug UART(UART4), usdhc. There is two MMC slots on the boards: mmc dev 0 -> connect USDHC3 -> the lower slot on the board, mmc dev 1 -> connect USDHC4 -> the upper slot on the board, Signed-off-by: NJason Liu <jason.hui@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Tested-by: NDirk Behme <dirk.behme@de.bosch.com>
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