- 17 1月, 2013 5 次提交
-
-
由 Tom Warren 提交于
These files are used by both SPL and main U-Boot. Also made minor changes to shared Tegra code to support T30 differences. Signed-off-by: NTom Warren <twarren@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidia.com>
-
由 Tom Warren 提交于
These files are for code that runs on the CPU (A9) on T30 boards. At this time, there are no T30-specific ARMV7 files. As T30-specific run-time code is added, it'll go here. Signed-off-by: NTom Warren <twarren@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidai.com>
-
由 Tom Warren 提交于
This provides SPL support for T30 boards - AVP early init, plus CPU (A9) init/jump to main U-Boot. Some changes were made to Tegra20 cpu.c to move common routines into tegra-common/cpu.c and reduce code duplication. Signed-off-by: NTom Warren <twarren@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Acked-by: NSimon Glass <sjg@chromium.org>
-
由 Tom Warren 提交于
Common Tegra files are in arch-tegra, shared between T20 and T30. Tegra30-specific headers are in arch-tegra30. Note that some of these will be filled in as more T30 support is added (drivers, WB/LP0 support, etc.). A couple of Tegra20 files were changed to support common headers in arch-tegra, also. Signed-off-by: NTom Warren <twarren@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Acked-by: NSimon Glass <sjg@chromium.org>
-
由 Marc Dietrich 提交于
Boards may require a different pinmux setup for DISPALY than the default one. Add a way to call into board specific code to set this up. Signed-off-by: NMarc Dietrich <marvin24@gmx.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
- 15 1月, 2013 1 次提交
-
-
由 Łukasz Dałek 提交于
When u-boot is compiled for PXA25x processor, pxa/start.S is calling cpu_init_crit by BL instruction. BL is overwriting lr register so relocate_code is going into infinite loop. This patch preservs lr register in r12 before calling cpu_init_crit and after function returns restores it. Signed-off-by: NLukasz Dalek <luk0104@gmail.com> Acked-by: NMarek Vasut <marex@denx.de>
-
- 13 1月, 2013 1 次提交
-
-
由 Troy Kisky 提交于
Use a common watchdog driver for all these cpus. Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com> Acked-by: NStefano Babic <sbabic@denx.de>
-
- 12 1月, 2013 1 次提交
-
-
由 angelo 提交于
Fix coldfire serial driver bindings no more relocated to ram after last changes to drivers/serial/serial.c (regression). Serial initialization in ram has to be called after that gd->reloc_off is calculated. Signed-off-by: NAngelo Dureghello <sysamfw@gmail.com> Cc: Jason Jin <jason.jin@freescale.com> Acked-by: NJens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Tested-by: NJens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
-
- 11 1月, 2013 10 次提交
-
-
由 Jaehoon Chung 提交于
Mobile storage is used the CLK_DIV_FSYS3 value. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Nkyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Jaehoon Chung 提交于
To get exactly clock value for mmc, support the get_mmc_clk() like set_mmc_clk(). Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Taylor Hutt 提交于
The two modified lines were indented with spaces. They are now indented with tabs. Signed-off-by: NTaylor Hutt <thutt@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
-
由 Simon Glass 提交于
The timer may be inited in arch_cpu_init() so it is not safe to make a bootstage mark before this is called. Arrange the code to fix this. Note: The question was raised as to why we don't keep all archs in sync. PowerPC doesn't have specific bootstage markers at present (although it does use boot progress). I hope that the generic board series will solve this problem in general, but in the meantime this is a real problem, and only in ARM. We now get a correct time for board_init_f: Timer summary in microseconds: Mark Elapsed Stage 0 0 reset 100,000 100,000 spl_start 848,530 748,530 board_init_f 907,301 58,771 board_init_r 910,478 3,177 board_init Signed-off-by: NSimon Glass <sjg@chromium.org>
-
由 Tom Wai-Hong Tam 提交于
SPL u-boot may call do_reset() which depends on interrupts.o and reset.o. So make them also appear in SPL. Signed-off-by: NTom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
-
由 Simon Glass 提交于
This option displays board info after stdio is running, so that it will appear on the LCD. If it is displayed earlier, the board info will appear on the serial console but not on the LCD. Here follows a blow-by-blow description. 1a. Without CONFIG_DISPLAY_BOARDINFO_LATE, on serial: U-Boot 2011.12-02550-g037e1c5-dirty (Nov 15 2012 - 14:29:42) for SMDK5250 CPU: S5PC520 @ 1700MHz Board: Google Snow, rev 0 I2C: ready DRAM: 2 GiB Elpida DDR3 @ 800MHz MMC: S5P MSHC0: 0, S5P MSHC1: 1 SF: Detected W25Q32 with page size 4 KiB, total 4 MiB *** Warning - bad CRC, using default environment In: mkbp-keyb Out: lcd Err: lcd Net: No ethernet found. Hit any key to stop autoboot: 0 SMDK5250 # 1b. Without CONFIG_DISPLAY_BOARDINFO_LATE, on LCD (note machine info is missing): In: mkbp-keyb Out: lcd Err: lcd Net: No ethernet found. Hit any key to stop autoboot: 0 SMDK5250 # 2a. With CONFIG_DISPLAY_BOARDINFO_LATE, on serial: U-Boot 2011.12-02550-g037e1c5 (Nov 15 2012 - 14:27:40) for SMDK5250 CPU: S5PC520 @ 1700MHz I2C: ready DRAM: 2 GiB Elpida DDR3 @ 800MHz MMC: S5P MSHC0: 0, S5P MSHC1: 1 SF: Detected W25Q32 with page size 4 KiB, total 4 MiB *** Warning - bad CRC, using default environment Model: Google Snow In: mkbp-keyb Out: lcd Err: lcd Net: No ethernet found. Hit any key to stop autoboot: 0 SMDK5250 # 2b. With CONFIG_DISPLAY_BOARDINFO_LATE, on LCD (note machine info is present): Model: Google Snow In: mkbp-keyb Out: lcd Err: lcd Net: No ethernet found. Hit any key to stop autoboot: 0 SMDK5250 # Since the LCD is all that a typical user sees, it is useful to display the model there. We may be able to rearrange things some other way one day, but at present this seems like a convenient way of getting the required behaviour. Signed-off-by: NSimon Glass <sjg@chromium.org>
-
由 Simon Glass 提交于
This option delays loading of the environment until later, so that only the default environment will be available to U-Boot. This can address the security risk of untrusted data being used during boot. Any time you load untrusted data you expose yourself to a bug in the code. The attacker gets to choose the data so can sometimes carefully craft it to exploit a bug. We try to avoid touching user-controlled data during a verified boot unless strictly necessary. Since the default environment is good enough in this case (or you would just change it), this gets around the problem by just not loading the environment. When CONFIG_DELAY_ENVIRONMENT is defined, it is convenient to have a run-time way of enabling loading of the environment. Add this to the fdt as /config/delay-environment. Note: This patch depends on http://patchwork.ozlabs.org/patch/194342/Signed-off-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NDoug Anderson <dianders@chromium.org>
-
由 Simon Glass 提交于
We want to use the fdt inside board_early_init_f(), so check for its presence earlier in the pre-reloc init sequence. So far ARM and microblaze are the only only ones that use CONFIG_OF_CONTROL. Microblaze does not have the same init loop, and in particular does not have the board_early_init_f() call. So a patch for microblaze would have no meaning. Signed-off-by: NSimon Glass <sjg@chromium.org>
-
由 Gabe Black 提交于
It may be necessary to know where the TLB area ends as well as where it starts. This allows board code to complete a secure memory erase without destroying the page tables. Signed-off-by: NGabe Black <gabeblack@google.com> Signed-off-by: NSimon Glass <sjg@chromium.org>
-
由 Arun Mankuzhi 提交于
In Cortex-A15 architecture, when we run cache invalidate the cache clean operation executes automatically. So if there are any dirty cache lines before disabling the L2 cache these will be synchronized with the main memory when invalidate_dcache_all() runs in the last part of U-boot The two functions after flush_dcache_all is using the stack. So this data will be on the cache. After disable when invalidate is called the data will be flushed from cache to memory. This corrupts the stack in invalida_dcache_all. So this change is required to avoid the u-boot hang. So flush has to be done just before clearing CR_C bit Signed-off-by: NArun Mankuzhi <arun.m@samsung.com> Signed-off-by: NSimon Glass <sjg@chromium.org>
-
- 10 1月, 2013 4 次提交
-
-
由 Ajay Kumar 提交于
When only DP is used, we need not enable CONFIG_EXYNOS_MIPI_DSIM. But if we do not select CONFIG_EXYNOS_MIPI_DSIM, exynos_fb.c throws error saying exynos_mipi_dsi_init() not defined. So, we add dummy definition for exynos_mipi_dsi_init when CONFIG_EXYNOS_MIPI_DSIM is not defined. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Acked-by: NDonghwa Lee <dh09.lee@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Ajay Kumar 提交于
With VPLL as source clock to FIMD, Exynos DP Initializaton was failing sometimes with unstable clock. Changing FIMD source to MPLL resolves this issue. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Acked-by: NDonghwa Lee <dh09.lee@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Ajay Kumar 提交于
Add panel_info structure required by LCD driver and DP panel platdata for SMDK5250. Add GPIO configuration for LCD. Enable FIMD and DP support on SMDK5250. DP Panel size: 2560x1600. We use 16BPP resolution to get LCD console. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Acked-by: NSimon Glass <sjg@chomium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Fabio Estevam 提交于
Add workaround for the following ARM errata: 743622 and 751472. The motivation for this change is the following kernel commit 62e4d357a (ARM: 7609/1: disable errata work-arounds which access secure registers), which removes the errata from multiplatform kernel. Since imx has been converted to multiplatform in the kernel, we need to apply such workarounds into the bootloader. Workaround code has been taken from arch/arm/mm/proc-v7.S from 3.7.1 kernel. Explanation of each erratum is provided at "Chip Errata for the i.MX 6Dual/6Quad" document available at: cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
-
- 09 1月, 2013 4 次提交
-
-
由 Luke Lowrey 提交于
Modified the arch-kirkwood header so KWGBE_PORT_SERIAL_CONTROL1_REG(x) returns the correct address. Originally calling KWGBE_PORT_SERIAL_CONTROL1_REG(1) returned the address for port 0 and vice versa. Doesn't have any knock on effects to the u-boot code as the only time they're used is to do the same function to both addresses Signed-off-by: NLuke Lowrey <luke@chamsys.co.uk> Acked-by: NPrafulla Wadaskar <Prafulla@marvell.com> Acked-by: NHeiko Schocher <hs@denx.de>
-
由 Albert ARIBAUD 提交于
This saves stack and code memory for local copy, and consumes initialized data memory. For 22 of the 29 kirkwood-based boards, this results in a global saving of about 30 bytes. For 7 of them, it results in an increase of 6 to 14 bytes. Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
-
由 Albert ARIBAUD 提交于
Remove code such as unneeded includes or labels. These removals have no functional effect. Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
-
由 Albert ARIBAUD 提交于
Move all the C runtime setup code from every start.S in arch/arm into arch/arm/lib/crt0.S. This covers the code sequence from setting up the initial stack to calling into board_init_r(). Also, rewrite the C runtime setup and make functions board_init_*() and relocate_code() behave according to normal C semantics (no jumping across the C stack any more, etc). Some SPL targets had to be touched because they use start.S explicitly or for some reason; the relevant maintainers and custodians are cc:ed. Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
-
- 08 1月, 2013 6 次提交
-
-
由 Rajeshwari Shinde 提交于
This patch adds the device node required for USB Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Rajeshwari Shinde 提交于
Add SPI device node data for exynos. Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Rajeshwari Shinde 提交于
Add sound device node data for exynos Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Rajeshwari Shinde 提交于
Api is added to decode peripheral id based on the interrupt number of the peripheral. Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Rajeshwari Shinde 提交于
Add I2C device node data for exynos Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Piotr Wilczek 提交于
This patch add pinmux settings for Exynos4 for mmc0 and mmc2 Signed-off-by: NPiotr Wilczek <p.wilczek@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> CC: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
- 26 12月, 2012 6 次提交
-
-
由 Chander Kashyap 提交于
Adds functions to extract clock frequency of Exynos4x12 IPs. Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Hatim RV 提交于
Add device tree based ethernet driver for SMC911X controller on SMDK5250 boards. Signed-off-by: NHatim Ali <hatim.rv@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Hatim RV 提交于
This patch adds initial dts file for EXYNOS5250 SoC. This dts file currently include only ethernet devices and properties. More devices to be added in subsequent patches. Also add the dts file for SMDK5250 board which uses the EXYNOS5250 dts file. Signed-off-by: NHatim Ali <hatim.rv@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Chander Kashyap 提交于
This patch adds gpio structure for Exynos4x12. Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Chander Kashyap 提交于
This patch adds clock structure for Exynos4x12. Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
由 Chander Kashyap 提交于
This patch populates base addresses of Exynos4x12 registers. Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
-
- 20 12月, 2012 1 次提交
-
-
由 Yoshihiro Shimoda 提交于
The R0P7752C00000RZ board has SH7752, 512MB DDR3-SDRAM, SPI ROM, Gigabit Ethernet, and eMMC. This patch supports the following functions: - 512MB DDR3-SDRAM, SCIF4, SPI ROM, Gigabit Ethernet, eMMC Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
-
- 14 12月, 2012 1 次提交
-
-
由 Joe Hershberger 提交于
Move the getenv_yesno() to env_common.c and change most checks for 'y' or 'n' to use this helper. Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>
-