fatload USB was reported to fail on the Sheevaplug. Debugging showed that
this was caused by an incorrect unaligned write to memory in
path_to_uefi().

UEFI on ARM requires that unaligned memory access is enabled.

* ARMv5 does not support unaligned access at all.
* ARMv6 supports unaligned access when we clear the A flag and set the
  U flag.
* On ARMv7 unaligned access is possible when clearing the aligned flag,
  which we do in function allow_unaligned() (arch/arm/cpu/armv7/sctlr.S).
  For none of the other cpus in arch/arm/cpu/ we have implemented a
  similar function.
* ARMv8 allows unaligned access.

Let EFI_LOADER on ARM depend on SYS_CPU=armv7 or SYS_CPU=armv8.

Once we have implemented allow_unaligned() for other ARM CPUs we can add
these to Kconfig.
Reported-by: NGray Remlin <gryrmln@gmail.com>
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

Function efi_dp_from_dev() is not used anywhere. Remove it.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

Signed-off-by: NTom Rini <trini@konsulko.com>

- fix i.MX6ULL evk black screen observed while reboot stress tests
- remove "synopsys,dw-mipi-dsi" compatible to reduce the device tree
  differences between Linux and U-Boot for stm32mp1 platform

- Add support for rockchip SoC: PX30, RK3308
- Add and migrate to use common dram driver: PX30, RK3328, RK3399
- Add rk3399 board Tinker-s support
- Board config update for Rock960, Rockpro64

Add OP-TEE test swuit
Fix patman cc_file output
Minor sandbox/pinctrl changes

Support tinker-s board. The board is equivalent of tinker board
except of emmc.

TODO:
- support of usb current burst when the board is powered from pc
Signed-off-by: NMichael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

dmc is used to initialize the memory controller. It's needed by
u-boot. Move it in the specific section
Signed-off-by: NMichael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

We shouldn't force which allocator the SPL uses, since there's no
platform requirement for one over the other: in fact, we currently allow
selection of the TPL allocator but not the SPL one!
Signed-off-by: NThomas Hebb <tommyhebb@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

The common SPL removed SoC-specific code for RK3399's SPL and in the
process caused the previously-unconditional DRAM initialization in
board_init_f() to only happen when compiling a configuration that does not
support TPL, meaning DRAM never gets initialized if TPL is supported but
disabled.

Fix this by omitting the DRAM init in SPL only when we are configured to
also build a TPL. This fixes custom configurations that have disabled
TPL, and it should also unbreak the "ficus-rk3399", "rock960-rk3399",
and "chromebook_bob" defconfigs, although since I don't have any of
those devices I can't confirm they're broken now.

Fixes: b7abef2e ("rockchip: rk3399: Migrate to use common spl board file")
Signed-off-by: NThomas Hebb <tommyhebb@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

The common SPL code reordered the DRAM initialization before
rockchip_stimer_init(), which as far as I can tell causes the RK3399 to
lock up completely.

Fix this issue in the common code by putting the DRAM init back after
timer init. I have only tested this on the RK3399, but it wouldn't make
any sense for the timer init to require DRAM be set up on any system.

Fixes: b7abef2e ("rockchip: rk3399: Migrate to use common spl board file")
Signed-off-by: NThomas Hebb <tommyhebb@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add build documentation for rk3308 based boards.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

ROC-RK3308-CC is a rk3308 based board designed by
Firelfy, with eMMC and 256MB DDR3 and RTL8188 Wifi
on board.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add dts file for ROC-RK3308-CC from firefly.

Sync form linux rockchip for v5.5-armsoc/dts64:
"arm64: dts: rockchip: Add devicetree for board roc-rk3308-cc"
(sha1: 4403e1237be3af0977aa23ef399e3496316317a0)
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Usage:

 (1) tools/mkimage -n rk3308 -T rksd -d tpl/u-boot-tpl.bin idbloader.img
 (2) cat spl/u-boot-spl.bin >> idbloader.img
 (3) upgrade_tool wl 0x40 idbloader.img

Note:
  When use ddr binary from rkbin as tpl, use it replace u-boot-tpl.bin in(1)
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

A dm based dram driver for rk3308 u-boot
to get capacity.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add support for rk3308 evaluation board.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add dts for rk3308 evb, sync from the linux kernel
upstream list [0].

[0]https://patchwork.kernel.org/patch/11201555/Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add clk controller driver for RK3308 SOC.

This patch depends on Elaine's pll patch[0].

[0]http://patchwork.ozlabs.org/patch/1183718/Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

RK3308 is a quad Cortex A35 based SOC with rich audio
interfaces(I2S/PCM/TDM/PDM/SPDIF/VAD/HDMI ARC), which
designed for intelligent voice interaction and audio
input/output processing.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Common PLL setup function, compatible with different SOC.
Mainly for the subsequent new SOC use.
Signed-off-by: NElaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Add vdd_log node according to rock960 schematic V13.
This patch affect two boards:
- Rock960 Model A
- Ficus
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

The u-boot specific device tree directives should be in u-boot.dtsi
Signed-off-by: NPeter Robinson <pbrobinson@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

The u-boot specific device tree directives should be in u-boot.dtsi
Signed-off-by: NPeter Robinson <pbrobinson@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

The u-boot specific pieces in the dts files should be in u-boot.dtsi
not the main files, this allows easier sync with upstream. The
rk3399.dtsi has a mix of both so move them all for consistency.
Signed-off-by: NPeter Robinson <pbrobinson@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
(Fix with missing pmugrf)
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

rockpro64 needs to setup I/O domains in order for USB to work in u-boot.
Since we currently don't have a driver to do that, split it into its own
board file and initialize I/O domains here.
Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

CONFIG_IS_ENABLED() needs the config name like used in Kconfig, so
without the leading CONFIG_. The clock drivers all wrongly check for
CONFIG_RESET_ROCKCHIP, fix that
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

rockchip_reset_bind() already does the needed init for the reset
registers, only referenced the wrong cru structure.

So we can get rid of the open-coded reset init and just fix
the correct cru reference.
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

The rk3399 VD_CENTER voltage domain is not subject to dynamic voltage
scaling. So the regulator reset voltage of 0.9V is used on this board.
Let u-boot initialize the center voltage to 0.95V as it is done for the
VD_LOGIC domain. This avoids instability and occasional linux kernel
Opses on this board.
Signed-off-by: NSoeren Moch <smoch@web.de>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

The most important change for u-boot is the fix for the vdd-log pwm
voltage regulator to avoid overvoltage for the VD_LOGIC power domain.
Signed-off-by: NSoeren Moch <smoch@web.de>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Enable TPL for rock960 like other rk3399 boards.
Signed-off-by: NPeter Robinson <pbrobinson@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

roc-rk3399-pc_defconfig is committed in below

commit <8a681f4c> ("rockchip: rk3399:
Add ROC-RK3399-PC support")

which doesn't follow the existing defconfigs on rk3399.

So, rename as followed with other rk3399 defconfigs.

Cc: Levin Du <djw@t-chip.com.cn>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Few important regulator power rails fixes are available in
linux-next, so sync them same.

Here is the last commit details:
commit <9f7f9b610e1b7d2dc86c543ab0dfcf781bd42326> ("arm64: dts:
rockchip: Fix roc-rk3399-pc regulator input rails")

Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Levin Du <djw@t-chip.com.cn>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

RK3288 needs to init the otg_data in board level to make the phy driver
work.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Migrate to use ofnode_* instead of fdt_* so that we may able to use live
dt for usb udc driver.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

The px30 evb is an evaluation board for the px30 together with a dsi-
connected display. This adds board and config files for it.
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>