rockchip: SPL: fix ordering of DRAM init

The common SPL code reordered the DRAM initialization before
rockchip_stimer_init(), which as far as I can tell causes the RK3399 to
lock up completely.

Fix this issue in the common code by putting the DRAM init back after
timer init. I have only tested this on the RK3399, but it wouldn't make
any sense for the timer init to require DRAM be set up on any system.

Fixes: b7abef2e ("rockchip: rk3399: Migrate to use common spl board file")
Signed-off-by: NThomas Hebb <tommyhebb@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

arch/arm/mach-rockchip/spl.c

@@ -127,6 +127,13 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 	arch_cpu_init();
+#if !defined(CONFIG_ROCKCHIP_RK3188)
+	rockchip_stimer_init();
+#endif
+#ifdef CONFIG_SYS_ARCH_TIMER
+	/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
+	timer_init();
+#endif
 #if !defined(CONFIG_SUPPORT_TPL) || defined(CONFIG_SPL_OS_BOOT)
 	debug("\nspl:init dram\n");
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
@@ -134,13 +141,6 @@ void board_init_f(ulong dummy)
 		printf("DRAM init failed: %d\n", ret);
 		return;
 	}
-#endif
-#if !defined(CONFIG_ROCKCHIP_RK3188)
-	rockchip_stimer_init();
-#endif
-#ifdef CONFIG_SYS_ARCH_TIMER
-	/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
-	timer_init();
 #endif
 	preloader_console_init();
 }