CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.
Signed-off-by: NChris Packham <judge.packham@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

With Makefiles testing for $(SPL_TPL_)SYSRESET, we need SPL_SYSRESET
for do_reset() in SPL for Rockchip SoCs.

References: 87c16d49 "drivers: spl: consistently use the $(SPL_TPL_) macro"
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

syscon id table need a dummy member as NULL ending, or else system
will panic while try to match a compatible in this table as a list.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Sometimes it's helpful to know the reset reason caused in the SoC.
Add reset reason detection for the RK3288 SoC.
This will set an environment variable which represents the reset reason.
Signed-off-by: NWadim Egorov <w.egorov@phytec.de>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

The IPSR18 register bits were missing from the R8A7795 ES2.0+ PFC
tables, which triggered a BUG() in sh_pfc driver. This is because
of an out-of-bounds access to the pinmux_gpios[] array in the PFC
tables, which was too short due to the missing IPSR18 bits.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

It was noticed a few times, that the reboot from Linux (reboot command)
is different from the reboot (reset command) under U-Boot. The U-Boot
version does seem to reset the board more deeply (PCI cards etc) than
the Linux reboot.

This is actually caused by missing full reset bit in the reset register
value in the ACPI FADT table.
Reported-by: NStefan Roese <sr@denx.de>
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>

This converts the following to Kconfig:
   CONFIG_SPL_OMAP3_ID_NAND
Signed-off-by: NAdam Ford <aford173@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This converts the following to Kconfig:
   CONFIG_SYS_I2C_BUS_MAX
Signed-off-by: NAdam Ford <aford173@gmail.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>
[trini: Fix AM43XX drop AM44XX]
Signed-off-by: NTom Rini <trini@konsulko.com>

For consistency with other platforms and in preparation of Kconfig
migration, let's change Several TI platforms that use I2C_BUS_MAX
to CONFIG_SYS_I2C_BUS_MAX
Signed-off-by: NAdam Ford <aford173@gmail.com>

- Move ANDROID_IMAGE_SUPPORT to top level Kconfig under images as it's
  not strictly part of fastboot.
- Add some defaults for the fastboot buffer location and size
- Migrate all options listed in cmd/fastboot/Kconfig
- Cleanup the README
Signed-off-by: NTom Rini <trini@konsulko.com>

SUNXI_GMAC was still used to configure the code where as the
same has been renamed and moved to Kconfig in below commit
"sunxi: Move SUNXI_GMAC to Kconfig"
(sha1: 4d43d065)
Signed-off-by: NDave Prue <dave@prue.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Reviewed-by: NMark Kettenis <kettenis@openbsd.org>
Tested-by: NMark Kettenis <kettenis@openbsd.org>
[Tweek commit message, config_whitelist.txt, build-whitelist.sh]
Signed-off-by: NJagan Teki <jagan@openedev.com>

Memory dt node update introduced by spl_fixup_fdt() in below
commit was making DDR configuration in-appropriate
to boot falcon mode. Hence added dram_init_banksize for
explicit assignment of  proper base and size of DDR.

"boot: fdt: Perform arch_fixup_fdt() on the given device tree for falcon boot"
(sha1: 6e7585bb)
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

The NXP i.MX 6UL and 6ULL do not support SATA and have no SATA
boot mode, hence remove it from the boot device detecion. This
fixes a build error introduced with 3bd1642d ("imx: fix USB
boot mode detection for i.MX 6UL and 6ULL")

Fixes: 3bd1642d ("imx: fix USB boot mode detection for i.MX 6UL and 6ULL")
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Reviewed-by: NJagan Teki <jagan@openedev.com>

U-boots spi-nor support is currently considered a work in progress. For
now to avoid issues it is necessary to add a "spi-flash" compatible
string. Eventually the "jedec,spi-nor" will be sufficient when the core
U-boot code is updated to support it.
Signed-off-by: NChris Packham <judge.packham@gmail.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Signed-off-by: NStefan Roese <sr@denx.de>

The system bus is not enabled by default for NAND, eMMC boot
etc. of PXs3.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This imply was added when the option was moved by the moveconfig tool,
but the intention is not clear.  Move it to defconfig.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Support PXs3 SoC and its reference development board.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Import updates queued up for Linux 4.14-rc1.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Signed-off-by: NDai Okamura <okamura.dai@socionext.com>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This is now set up by the pinctrl driver when the NAND driver is
probed.  Remove the legacy code.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The new SoC PXs3 changed the address of PLL, but still uses the
same PLL name.  We can not define SC_*PLLCTRL in the common header.
Move them to per-SoC .c file.  Also, fix some PLL comments.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The #include <common.h> was added for mdelay().  Later, the declaration
of mdelay was moved to <linux/delay.h> by commit 5bc516ed ("delay:
collect {m, n, u}delay declarations to include/linux/delay.h").

There is no need to include <common.h> now.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The soc_boot_modes array is only used by bmode command
and not needed in SPL. Don't include it into SPL.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Reviewed-by: NStefano Babic <sbabic@denx.de>

There is no need to clear the control register 100 times in a
loop, a single zero write clears the register. I didn't find any
justification why clearing this register in a loop is needed
(no info in i.MX6 errata or GPT timer linux driver, linux driver
uses single write to clear this control register).
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Acked-by: NStefano Babic <sbabic@denx.de>

The eMMC controller for the A83T uses the new operating mode. Enable it.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

Almost all of the newer Allwinner SoCs have a new operating mode for the
eMMC clocks that needs to be enabled in both the clock and the MMC
controller.

Details about that mode are sparse, and the name itself (new mode vs old
mode) doesn't give much details, but it seems that the it changes the
sampling of the MMC clock. One side effect is also that it divides the
parent clock rate by 2.

Add support for it through a Kconfig option.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

This adds invalidate_dcache_range() so that some drivers can build
without error on sandbox.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>

Since the gpr_init() function is common for boards using MX6S, MX6DL, MX6D,
MX6Q and MX6QP processors move it to the soc.c file.
Signed-off-by: NBreno Lima <breno.lima@nxp.com>
Acked-by: NStefano Babic <sbabic@denx.de>
Reviewed-by: NLukasz Majewski <lukma@denx.de>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

While it is true that we no longer have 'ppcenv' and similar sections,
including env/embedded.o at all results in the text/etc sections being
available for the rest of the link.  This in turn is required for the
setup used on ms7722se.  This also, likely, needs further fine-tuning.

Fixes: f40ad66f ("arch/sh: don't bring common/env_embedded.o into the link")
Signed-off-by: NTom Rini <trini@konsulko.com>

With this change, it will be possible to de-select falcon mode & spl
will only boot U-Boot.
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
Suggested-by: NBo Shen <voice.shen@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

kASLR support in kernel requires a random number to be passed via
chosen/kaslr-seed propert. sec_firmware generates this random seed
which can then be passed in the device tree node.

sec_firmware reserves JR3 for it's own usage. Node for JR3 is
removed from device-tree.
Signed-off-by: NRuchika Gupta <ruchika.gupta@nxp.com>

do_switch_ecc() calls fsmc_nand_switch_ecc(), which is a direct
function call into drivers/mtd/nand/fsmc_nand.c. However, this
function is not guarded by CONFIG_NAND_FSMC, which results to a build
failure if CONFIG_NAND_FSMC is disabled.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>

The code in board/spear/common/ is not board-specific but
SoC-specific. Therefore, boards from other vendors than "spear" may
want to re-use this code, which is currently difficult with the code
being placed in board/spear/common/.

Since this code really is SoC-specific, this commit moves it to
arch/arm/cpu/arm926ejs/spear/, with the rest of the SPEAr related
code.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>

Use the Atmel PIT timer driver which supports the driver model
and device tree.
Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com>

Add the new Atmel PIT timer driver, which supports the driver model
and device tree.
Signed-off-by: NWenyou Yang <wenyou.yang@microchip.com>

The function interrupt_init_cpu() is given an int return type but does
not return anything but 0.  Rework this to be a void function.
Signed-off-by: NTom Rini <trini@konsulko.com>
Acked-by: NMario Six <mario.six@gdsys.cc>

This re-syncs AM33xx DTS file with current file from
Linux v4.13-rc4 to ensure a consistent configuration. Upstream
Linux removed the redundant Interrupt-parent property from mmc,
mac, lcdc and tscadc sub nodes.
Signed-off-by: NSuniel Mahesh <sunil.m@techveda.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

The linker script for SuperH brings the .ppcenv and .ppcenvr section
of common/env_embedded.o into the .text section. However, the .ppcenv
section is only ever filled in by env_embedded.o when
CONFIG_SYS_USE_PPCENV is defined, but no platforms in mainline U-Boot
use this.

In addition, common/env_embedded.o is not always built (when you use
CONFIG_ENV_IS_NOWHERE for example), which causes the following build
failure:

Fixes:

  LD      u-boot
/home/thomas/sh4aeb-linux-musl/bin/sh4aeb-linux-ld.bfd: cannot find common/env_embedded.o

We fix this by no longer adding the .ppcenv and .ppcenvr sections from
common/env_embedded.o into the .text section.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

The SuperH architecture allows to be run in either little or big
endian mode. Some SuperH SoCs get the little vs. big endian decision
through mode pins sampled at reset, so if big endian has been choosen
by HW designers, it cannot be easily changed.

Therefore, it makes sense to allow building U-Boot for SuperH in big
endian mode. To allow this, the only change needed is to adjust the
OUTPUT_FORMAT() in the linker script.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>