- 16 5月, 2014 1 次提交
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由 Albert ARIBAUD 提交于
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- 15 5月, 2014 7 次提交
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由 Albert ARIBAUD 提交于
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由 Albert ARIBAUD 提交于
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由 Albert ARIBAUD 提交于
Exception handling is basically identical for all ARM targets. Factorize it out of the various start.S files and into a single vectors.S file, and adjust linker scripts accordingly. Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
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由 Albert ARIBAUD 提交于
Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
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由 Albert ARIBAUD 提交于
PXA start.S has a PXA (variant) specific check in start.S. Move it to cpuinfo.c. Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: NMarek Vasut <marex@denx.de>
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由 Albert ARIBAUD 提交于
CPUs arm946es and sa1100 both define the reset_cpu() function in their start.S file. Move this cpu-specific code into cpu.c so that start.S only contains ARM generic code. Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
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由 Albert ARIBAUD 提交于
arch/arm/cpu/arm1136/start.S contain a cache flushing function. Remove the function and move its code into arch/arm/lib/cache.c. Signed-off-by: NAlbert ARIBAUD <albert.u.boot@aribaud.net>
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- 14 5月, 2014 27 次提交
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由 Belisko Marek 提交于
We need to flip only one bit not assign. Signed-off-by: NMarek Belisko <marek.belisko@gmail.com> Acked-by: NPekon Gupta <pekon@ti.com>
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由 Ash Charles 提交于
This adds the Gumstix Pepper[1] single-board computer based on the TI AM335x processor. Schematics are available [2]. [1] https://store.gumstix.com/index.php/products/344/ [2] https://pubs.gumstix.com/boards/PEPPER/Signed-off-by: NAsh Charles <ash@gumstix.com> [trini: Move 'cdev' in board.c down to under #ifdef's where it's used] Signed-off-by: NTom Rini <trini@ti.com>
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由 Christian Riesch 提交于
The commits commit b7b5f1a1 Author: Albert ARIBAUD <albert.u.boot@aribaud.net> da850evm, da850_am18xxevm: convert to CONFIG_SPL_MAX_FOOTPRINT and commit e7497891 Author: Albert ARIBAUD <albert.u.boot@aribaud.net> cam_enc_4xx: convert to CONFIG_SPL_MAX_FOOTPRINT replaced CONFIG_SPL_MAX_SIZE by CONFIG_SPL_MAX_FOOTPRINT. However, CONFIG_SPL_MAX_SIZE is used in the Makefile for padding the SPL when preparing an u-boot.ais image. By removing CONFIG_SPL_MAX_SIZE said commits broke the ais image of the da850evm and cam_enc_4xx configurations. This patch converts the u-boot.ais target to use CONFIG_SPL_PAD_TO instead of CONFIG_SPL_MAX_SIZE for padding the SPL and adds a #define CONFIG_SPL_PAD_TO where it is required. Signed-off-by: NChristian Riesch <christian.riesch@omicron.at> Reported-by: NTom Taylor <ttaylor.tampa@gmail.com> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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由 Egli, Samuel 提交于
Signed-off-by: NSamuel Egli <samuel.egli@siemens.com> Reviewed-by: NRoger Meier <r.meier@siemens.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de>
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由 Egli, Samuel 提交于
The actual board name is draco and dxr2 is the target name. In the future we'll have different targets based on draco board. All changes are purely non-functional and basically rename dxr2 to draco. One style fix in board.c that existed already before. Signed-off-by: NSamuel Egli <samuel.egli@siemens.com> Reviewed-by: NRoger Meier <r.meier@siemens.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de>
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由 Robert Nelson 提交于
Fall back to previous dtb used when omap3-beagle-xm-ab.dtb doesn't exist in file system Signed-off-by: NRobert Nelson <robertcnelson@gmail.com> CC: Tom Rini <trini@ti.com> CC: Nishanth Menon <nm@ti.com> Acked-by: NTom Rini <trini@ti.com>
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由 Robert Nelson 提交于
As of v3.15-rc3, omap3-beagle-xm-ab.dtb now exists with the usb hub (ehci) enabled. For older kernels versions, cherry pick from mainline: ef78f3869c37c480f1d58462a760a40dabc823f4 Signed-off-by: NRobert Nelson <robertcnelson@gmail.com> CC: Tom Rini <trini@ti.com> CC: Nishanth Menon <nm@ti.com>
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由 Dmitry Lifshitz 提交于
Add CKOBUFFER_CLK_EN bit mask enabling FREF_XTAL_CLK clock. Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il>
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由 Dmitry Lifshitz 提交于
Add defines required to turn on LDO2 regulator. Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il>
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由 Dmitry Lifshitz 提交于
Add UART4 base address. Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il>
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由 Egli, Samuel 提交于
Signed-off-by: NSamuel Egli <samuel.egli@siemens.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de>
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由 Egli, Samuel 提交于
In order to have the same LED indication like in another product when ready for updating, enable only red led and disable status LED when entering DFU mode. The status LED is only switched off when defined in board file. Signed-off-by: NSamuel Egli <samuel.egli@siemens.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de>
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由 Egli, Samuel 提交于
* remove setting LED in user button function. We want to decouple reading user button and setting LED. This two things need to be done independently. * led cmd can be used to control LEDs that are defined in board file having a led cmd, one can easily set LEDs in u-boot shell. For example bootcmd can be extended to disable status LED before loading kernel. Signed-off-by: NSamuel Egli <samuel.egli@siemens.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de>
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由 Egli, Samuel 提交于
* add parameters for factory and print them at start up to facilitate control of right DDR3 settings in EEPROM. * cosmetic changes in a couple of printfs Signed-off-by: NSamuel Egli <samuel.egli@siemens.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de>
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由 Egli, Samuel 提交于
For dxr2 board DXR2_IOCTRL_VAL is set by data in EEPROM. In pxm2 board it does not make sense to have dxr2 as prefix. Replace it with more meaningful DDR prefix. Signed-off-by: NSamuel Egli <samuel.egli@siemens.com> Cc: Pascal Bach <pascal.bach@siemens.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de>
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由 Yegor Yefremov 提交于
Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com>
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由 Khoronzhuk, Ivan 提交于
We should use generic board in order the ARM maintainer be able to remove arch/arm/lib/board.c Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
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由 Stephen Warren 提交于
U-Boot on Tegra30 currently selects a main CPU frequency that cannot be supported at all on some SKUs, and needs higher VDD_CPU/VDD_CORE values on some others. This can result in unreliable operation of the main CPUs. Resolve this by switching to a CPU frequency that can be supported by any SKU. According to the following link, the maximum supported CPU frequency of the slowest Tegra30 SKU is 600MHz: repo http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=summary branch l4t/l4t-r16-r2 path arch/arm/mach-tegra/tegra3_dvfs.c table cpu_dvfs_table[] According to that same table, the minimum VDD_CPU required to operate at that frequency across all SKUs is 1.007V. Given the adjustment resolution of the TPS65911 PMIC that's used on all Tegra30-based boards we support, we'll end up using 1.0125V instead. At that VDD_CPU, tegra3_get_core_floor_mv() in that same file dictates that VDD_CORE must be at least 1.2V on all SKUs. According to tegra_core_speedo_mv() (in tegra3_speedo.c in the same source tree), that voltage is safe for all SKUs. An alternative would be to port much of the code from tegra3_dvfs.c and tegra3_speedo.c in the kernel tree mentioned above. That's more work than I want to take on right now. While all the currently supported boards use the same regulator chip for VDD_CPU, different types of regulators are used for VDD_CORE. Hence, we add some small conditional code to select how VDD_CORE is programmed. If this becomes more complex in the future as new boards are added, or we end up adding code to detect the SoC SKU and dynamically determine the allowed frequency and required voltages, we should probably make this a runtime call into a function provided by the board file and/or relevant PMIC driver. Cc: Alban Bedel <alban.bedel@avionic-design.de> Cc: Marcel Ziswiler <marcel@ziswiler.com> Cc: Bard Liao <bardliao@realtek.com> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
The Venice2 pinmux spreadsheet was updated to fix a few issues. Import those changes into the U-Boot pinmux initialization tables. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
This re-imports the entire Venice2 pinmux data from the board's master spreadsheet, and makes use of the new IO clamping GPIO initialization table features. This makes the board port fully compliant with the required HW-defined pinmux initialization sequence. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
The HW-defined procedure for booting Tegra requires that CLAMP_INPUTS_WHEN_TRISTATED be enabled before programming the pinmux. Modify the Jetson TK1 board to do this. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
The HW-defined procedure for booting Tegra requires that some pins be set up as GPIOs immediately at boot in order to avoid glitches on those pins, when the pinmux is programmed. This patch implements this procedure for Jetson TK1. For pins which are to be used as GPIOs, the pinmux mux function need not be programmed, so the pinmux table is also adjusted. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
The HW-defined procedure for booting Tegra requires that CLAMP_INPUTS_WHEN_TRISTATED be enabled before programming the pinmux. Add a function to the pinmux driver to allow boards to do this. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
The HW-defined procedure for booting Tegra requires that some pins be set up as GPIOs immediately at boot in order to avoid glitches on those pins, when the pinmux is programmed. Add a feature to the GPIO driver which executes a GPIO configuration table. Board files will use this to implement the correct HW initialization procedure. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
Define enum PMUX_FUNC_DEFAULT, which indicates that a table entry passed to pinmux_config_pingrp()/pinmux_config_pingrp_table() shouldn't change the mux option in HW. For pins that will be used as GPIOs, the mux option is irrelevant, so we simply don't want to define any mux option in the pinmux initialization table. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
The register writes performed by arch/arm/cpu/arm720t/tegra30/cpu.c enable_cpu_power_rail() set the voltage to 1.0V not 1.4V as the comment implies. Fix the comment. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
If CONFIG_API is ever to be enabled on Tegra, this define must be set, since api/api_storage.c uses it. A couple of annoyting things about CONFIG_SYS_MMC_MAX_DEVICE 1) It isn't documented in README. The same is true for a lot of similar defines used by api_storage.c. 2) It doesn't represent MAX_DEVICE but rather NUM_DEVICES, since the valid values are 0..n-1 not 0..n. However, I this patch does not address those shortcomings. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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- 13 5月, 2014 4 次提交
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由 Akshay Saraswat 提交于
Enabling configs for GPIO CMD, EXYNOS4 family and replacing exynos_gpio_get with new linear GPIO pin number required because of the new function asking only 2 arguments (pin and value) instead of 3 (bank, pin and value). Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Acked-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Akshay Saraswat 提交于
This patch includes following changes : * Adds gpio pin numbering support for EXYNOS SOCs. To have consistent 0..n-1 GPIO numbering the banks are divided into different parts where ever they have holes in them. * Rename GPIO definitions from GPIO_... to S5P_GPIO_... These changes were done to enable cmd_gpio for EXYNOS and cmd_gpio has GPIO_INPUT same as s5p_gpio driver and hence getting a error during compilation. * Adds support for name to gpio conversion in s5p_gpio to enable gpio command EXYNOS SoCs. Function has been added to asm/gpio.h to decode the input gpio name to gpio number. Example: SMDK5420 # gpio set gpa00 Signed-off-by: NLeela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Acked-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Mateusz Zalega 提交于
Because I'm leaving Samsung Electronics, I won't have access to their developer hardware anymore. Przemyslaw Marczak will take over my responsibilities. Signed-off-by: NMateusz Zalega <m.zalega@samsung.com> Acked-by: NPrzemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Akshay Saraswat 提交于
Adding two configs: * CONFIG_FIT - Enable FIT image support. * CONFIG_FIT_BEST_MATCH - Enable fetching correct DTB from FIT image by comparing compatibles. Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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- 09 5月, 2014 1 次提交
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由 Albert ARIBAUD 提交于
Conflicts: drivers/net/Makefile (trivial merge)
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