soc_xilinx_zynqmp driver allows identification of family & revision
of zynqmp SoC. This driver is selected by CONFIG_SOC_XILINX_ZYNQMP.
Add this config to xilinx_zynqmp_virt_defconfig file.
Probe this driver using platdata U_BOOT_DEVICE structure which is
specified in mach-zynqmp/cpu.c.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename this option so that CONFIG_IS_ENABLED can be used with it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rename this option so that CONFIG_IS_ENABLED can be used with it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>

Add a bus driver for this and use it to configure the bus parameters for
the Ethernet interface. Drop the old pre-driver-model code.

Switch over to use driver model for Ethernet.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

As the deadline for migration to DM_USB, when using a USB host
controller has now gone two years past the deadline, enforce migration.
This is done by:

- Ensuring that all host controller options (other than the very legacy
  old MUSB ones) now select USB_HOST.  USB_HOST now enforces DM_USB and
  OF_CONTROL.
  - Remove other parts of Kconfig logic that had platforms pick DM_USB.
  - To keep Kconfig happy, have some select statements test for USB_HOST
    as well.
- Re-order some Kconfig entries and menus so that we can cleanly pick
  host or gadget roles.  For the various HCD options that have platform
  glue options, group them together and update dependencies in some
  cases.
- As SPL_DM_USB is not required, on platforms that had not yet enabled
  it, disable it.

Cc: Marek Vasut <marex@denx.de>
Cc: Icenowy Zheng <icenowy@aosc.io>
Cc: Samuel Holland <samuel@sholland.org>
Cc: FUKAUMI Naoki <naobsd@gmail.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

These boards have not been converted to CONFIG_DM_USB by the deadline
and is also missing conversion to CONFIG_DM.  Remove them.  As this is
the last of the SPEAr platforms, so remove the rest of the remaining
support as well.

Cc: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

These boards have not been converted to CONFIG_DM_USB by the deadline
and is also missing conversion to CONFIG_DM.  Remove them.  As this is
also the last SPEAR3XX platform, remove that symbol as well.

Cc: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

These boards have not been converted to CONFIG_DM_USB by the deadline
and is also missing conversion to CONFIG_DM.  Remove them.

Cc: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

These boards have not been converted to CONFIG_DM_USB by the deadline
and is also missing conversion to CONFIG_DM.  Remove them.

Cc: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

These boards have not been converted to CONFIG_DM_USB by the deadline
and is also missing conversion to CONFIG_DM.  Remove it

Cc: Ajay Bhargav <contact@8051projects.net>
Signed-off-by: NTom Rini <trini@konsulko.com>

These boards have not been converted to CONFIG_DM_USB by the deadline
and is also missing conversion to CONFIG_DM.  Remove it.

This is also the last PL010_SERIAL using board, so remove those
references.

Cc: Sergey Kostanbaev <sergey.kostanbaev@fairwaves.ru>
Signed-off-by: NTom Rini <trini@konsulko.com>

Add the DeveloperBox 96boards EE support. This board is also
known as Socionext SynQuacer E-Series. It contians one "SC2A11"
SoC, which has 24-cores of arm Cortex-A53, and 4 DDR3 slots,
3 PCIe slots (1 4x port and 2 1x ports which are expanded via
PCIe bridge chip), 2 USB 3.0 ports and 2 USB 2.0 ports, 2 SATA
ports and 1 GbE, 64MB NOR flash and 8GB eMMC on standard
MicroATX Form Factor.

For more information, see this page;
  https://www.96boards.org/product/developerbox/Signed-off-by: NMasami Hiramatsu <masami.hiramatsu@linaro.org>

Since some SoCs and boards do not hae extra asm/arch/gpio.h,
introduce CONFIG_GPIO_EXTRA_HEADER instead of adding
!define(CONFIG_ARCH_XXXX) in asm/gpio.h.
Signed-off-by: NMasami Hiramatsu <masami.hiramatsu@linaro.org>

The EXPU1 design is a new 40G capable ethernet service unit card for
Hitachi-Powergrids wired-com product lines.

The base SoC is same as for already added SELI8 card, consequently the
already added u-boot support for SELI8 is reused.
Signed-off-by: NRainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: NAleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
[Fixed new line error at EOF]
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>

CPU:   Freescale i.MX6ULL rev1.1 792 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 49C
Reset cause: POR
Model: Seeed NPi iMX6ULL Dev Board with NAND
Board: Seeed NPi i.MX6ULL Dev Board
DRAM:  512 MiB
NAND:  512 MiB
MMC:   FSL_SDHC: 0
In:    serial@2020000
Out:   serial@2020000
Err:   serial@2020000
Net:   FEC0

Working:
- Eth0
- MMC/SD
- NAND
- UART 1
- USB host
Signed-off-by: NNavin Sankar Velliangiri <navin@linumiz.com>

Note:

Changes in v2:

 * removed unnecessary space in imx6ull-seeed-npi-imx6ull-dev-board.dts file.
 * Used SZ_2M for CONFIG_SYS_MALLOC_LEN size allocation.

So far U-Boot was hard coding a (surely sufficient) memory size of 512
MB, even though all machines out there have at least 4GB of DRAM.
Since U-Boot uses its memory knowledge to populate the EFI memory map,
we are missing out here, at best losing everything beyond 4GB on Midway
boxes (which typically come with 8GB of DRAM).

Since the management processor populated the DT memory node already with
the detected DRAM size and configuration, we use that to populate
U-Boot's memory bank information, which is the base for the UEFI memory
map.
This finally allows us to get rid of the NR_DRAM_BANKS=0 hack, that we
had in place to avoid U-Boot messing up the DT memory node before
loading the kernel.

Also, to cover the whole of memory, we need to enable PHYS_64BIT.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>

To squash that nasty warning message and make better use of the newly
gained OF_CONTROL feature, let's convert the calxedagmac driver to the
"new" driver model.
The conversion is pretty straight forward, mostly just adjusting the
use of the involved data structures.
The only actual change is the required split of the receive routine into
a receive and free_pkt part.
Also this allows us to get rid of the hardcoded platform information and
explicit init calls.

This also uses the opportunity to wrap the code decoding the MMIO
register base address, to make it safe for using PHYS_64BIT later.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Reviewed-by: NRamon Fried <rfried.dev@gmail.com>

All Calxeda machines are actually a poster book example of device tree
usage: the DT is loaded from flash by the management processor into
DRAM, the memory node is populated with the detected DRAM size and this
DT is then handed over to the kernel.
So it's a shame that U-Boot didn't participate in this chain, but
fortunately this is easy to fix:

Define CONFIG_OF_CONTROL and CONFIG_OF_BOARD, and provide a trivial
function to tell U-Boot about the (fixed) location of the DTB in DRAM.
Then enable DM_SERIAL, to let the PL011 driver pick up the UART platform
data from the DT. Also define AHCI, to bring this driver into the driver
model world as well.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>

GIC_V3_ITS uses UCLASS_IRQ driver. Update Kconfig to select
IRQ when GIC_V3_ITS is enabled.
Signed-off-by: NWasim Khan <wasim.khan@nxp.com>
Reviewed-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Tested-by: NVladimir Oltean <vladimir.oltean@nxp.com>

With all preparations in place, switch over to DM_SERIAL.
Signed-off-by: NMichael Walle <michael@walle.cc>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

Move the CONFIG_DM_* from the defconfig to the TARGET_SL28 config.
Signed-off-by: NMichael Walle <michael@walle.cc>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

The SELI8 design is a new tdm service unit card for Hitachi-Powergrids
XMC and FOX product lines.

It is based on NXP LS1021 SoC and it provides following interfaces:
 - IFC interface for NOR, NAND and external FPGA's
 - 1 x RGMII ETH for debug purposes
 - 2 x SGMII ETH for management communication via back-plane
 - 1 x uQE HDLC for management communication via back-plane
 - 1 x I2C for peripheral devices
 - 1 x SPI for peripheral devices
 - 1 x UART for debug logging

It is foreseen that the design will be later re-used for another XMC and
FOX service cards with similar SoC requirements.
Signed-off-by: NRainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: NMatteo Ghidoni <matteo.ghidoni@hitachi-powergrids.com>
Signed-off-by: NAleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

These boards have not been converted to CONFIG_DM by the deadline.
Remove them.

Cc: Steve Rae <steve.rae@raedomain.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Steve Rae <steve.rae@raedomain.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Steve Rae <steve.rae@raedomain.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Eddy Petrișor <eddy.petrisor@gmail.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NTom Rini <trini@konsulko.com>

This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Philippe Reynes <tremyfr@yahoo.fr>
Cc: Eric Jarrige <eric.jarrige@armadeus.org>
Signed-off-by: NTom Rini <trini@konsulko.com>

This patch enable CAAM support for i.MX8M platforms.
Signed-off-by: NAymen Sghaier <aymen.sghaier@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Signed-off-by: NFranck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Create common macro TARGET_SOCFPGA_SOC64 for Stratix10 and Agilex.
Signed-off-by: NSiew Chin Lim <elly.siew.chin.lim@intel.com>

This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago.  In addition there are other DM
migrations it is also missing.  Remove it.

Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>

This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago.  In addition there are other DM
migrations it is also missing.  Remove it.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: NTom Rini <trini@konsulko.com>
Acked-by: NStefano Babic <sbabic@denx.de>

We can handle the sysc interconnect target module in a generic way for
many TI SoCs. Initially let's just enable domain clocks before the
children are probed.

The code is loosely based on the drivers/bus/ti-sysc.c of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/bus/ti-sysc.txt
Signed-off-by: NDario Binacchi <dariobin@libero.it>

For the sake of consistency (*) and order of initialization, i.e.
after we have got the ethernet address, interrupt and timer initialized,
try to initialize USB ethernet gadget.

*) for example, zynqmp uses same order.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: NAndre Przywara <andre.przywara@arm.com>
Tested-by: NAndre Przywara <andre.przywara@arm.com>
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>

This patch add base support for LX2162AQDS board.
LX2162AQDS board supports LX2162A family SoCs.
This patch add basic support of platform.
Signed-off-by: NIoana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: NZhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: Nhui.song <hui.song_1@nxp.com>
Signed-off-by: NManish Tomar <manish.tomar@nxp.com>
Signed-off-by: NVikas Singh <vikas.singh@nxp.com>
Signed-off-by: NMeenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Rebased]
Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>

Rockchip has many 32bit SoCs and some of them are support SPL_OPTEE now,
only boards with SPL_OPTEE support can fit BINMAN well, other boards
will fail at initr_binman() in U-Boot proper after below patch,
eg. rv1108 board.
    83187546 binman: Support multiple images in the library

Fixes: 79030a48 ("rockchip: Add Single boot image (with binman, pad_cat)")
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Add basic support for the Kontron SMARC-sAL28 board. This includes just
the bare minimum to be able to bring up the board and boot linux.

For now, the Single and Dual PHY variant is supported. Other variants
will fall back to the basic variant.

In particular, there is no watchdog support for now. This means that you
have to disable the default watchdog, otherwise you'll end up in the
recovery bootloader. See the board README for details.
Signed-off-by: NMichael Walle <michael@walle.cc>
Reviewed-by: NTom Rini <trini@konsulko.com>
Tested-by: NHeiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: NPriyanka Jain <priyanka.jain@nxp.com>