Add support for 3rd and 4th I2C.
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com>

Most of the I2C slaves support accesses in the typical style
that is : read/write series of bytes at particular address offset.
These transactions look like:"
(1) START:Address:Tx:Offset:RESTART:Address[0..4]:Tx/Rx:data[0..n]:STOP"

However there are certain devices which support accesses in
terms of the transactions as follows:
(2) "START:Address:Tx:Txdata[0..n1]:Clock_stretching:
        RESTART:Address:Rx:data[0..n2]"
Here Txdata is typically a command and some associated data,
similarly Rxdata could be command status plus some data received
as a response to the command sent.

Type (1) transactions are currently supportd in the
i2c driver using i2c_read and i2c_write APIs. I2C EEPROMs,
RTC, etc fall in this category.

To handle type (2) along with type (1) transactions,
i2c_read() function has been modified.
Signed-off-by: NShaveta Leekha <shaveta@freescale.com>
Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com>

This workaround is for the erratum I2C A004447. Device reference
manual provides a scheme that allows the I2C master controller
to generate nine SCL pulses, which enable an I2C slave device
that held SDA low to release SDA. However, due to this erratum,
this scheme no longer works. In addition, when I2C is used as
a source of the PBL, the state machine is not able to recover.

At the same time, delete the reduplicative definition of SVR_VER
and SVR_REV. The SVR_REV is the low 8 bits rather than the low 16
bits of svr. And we use the CONFIG_SYS_FSL_A004447_SVR_REV macro
instead of hard-code value 0x10, 0x11 and 0x20.

The CONFIG_SYS_FSL_A004447_SVR_REV = 0x00 represents that one
version of platform has this I2C errata. So enable this errata
by IS_SVR_REV(svr, maj, min) function.
Signed-off-by: NZhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: NChunhe Lan <Chunhe.Lan@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Heiko Schocher <hs@denx.de>

When the code detected that the bus is hung (e.g. SDA stuck low),
send 9 pulses on SCL to try to fixup the bus.
Signed-off-by: NZhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: NChunhe Lan <Chunhe.Lan@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Heiko Schocher <hs@denx.de>

- added to fsl_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: NHeiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>

if alen is 0: no longer start a write cycle before reading data.
Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: NReinhard Pfau <reinhard.pfau@gdsys.cc>
Acked-by: NHeiko Schocher <hs@denx.de>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Move these fields into arch_global_data and tidy up. This is needed for
both ppc and m68k since they share the i2c driver.
Signed-off-by: NSimon Glass <sjg@chromium.org>

fsl_i2c.c:217:14: warning: symbol 'get_i2c_clock' was not declared. Should it be static?
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Acked-by: NHeiko Schocher <hs@denx.de>

fsl_i2c.c: In function 'i2c_init':
fsl_i2c.c:245:7: warning: assignment discards qualifiers from pointer target type
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Make the I2C2 and I2C1 use the same initialize codes.
Signed-off-by: NJerry Huang <Chang-Ming.Huang@freescale.com>

This patch adds a callpoint in i2c_init that allows board specific
i2c board initialization (typically for i2c bus reset) that is called
after i2c_init operations, allowing the i2c_board_late_init function
to use the pre-configured i2c bus speed and slave address.

The value of I2C_TIMEOUT in fsl_i2c.c has several problems.  First, it is
defined as CONFIG_HZ/4, but it is used as a count of microseconds, so it makes
no sense to derive it from a clock rate.  Second, the current value (250) is
too low for some boards, so it needs to be increased.  Third, the timeout
necessary for multiple-master arbitration is larger than the timeout for basic
read/write operations, so we shouldn't have a single constant for both timeouts.
Finally, it would be nice if we could override these values on a per-board
basis.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Acked-by: NWolfgang Denk <wd@denx.de>
Tested-by: NPeter Tyser <ptyser@xes-inc.com>
Acked-by: NPeter Tyser <ptyser@xes-inc.com>

__i2c_read always ends with a STOP condition thereby releasing
the bus. It is cleaner to do the STOP magic in i2c_read(), like
i2c_write() does. This may also help future multimaster systems which
wants to hold on to the bus until all transactions are finished.
Signed-off-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se>

The latest AN2919 has changed the way FDR/DFSR should be calculated.
Update the driver according to spec. However, Condition 2
is not accounted for as it is not clear how to do so.
Signed-off-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se>
Acked-by: NWolfgang Grandegger <wg@grandegger.com>

Some boards need a higher DFSR value than the spec currently
recommends so give these boards the means to define there own.

For completeness, add CONFIG_FSL_I2C_CUSTOM_FDR too.
Signed-off-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se>

After issuing a STOP one must wait until the STOP has completed
on the bus before doing something new to the controller.

Also add an extra read of SR as the manual mentions doing that
is a good idea.

Remove surplus write of CR just before a write, isn't required and
could potentially disturb the I2C bus.
Signed-off-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se>

The value of I2C_TIMEOUT in fsl_i2c.c has several problems.  First, it is
defined as CONFIG_HZ/4, but it is used as a count of microseconds, so it makes
no sense to derive it from a clock rate.  Second, the current value (250) is
too low for some boards, so it needs to be increased.  Third, the timeout
necessary for multiple-master arbitration is larger than the timeout for basic
read/write operations, so we shouldn't have a single constant for both timeouts.
Finally, it would be nice if we could override these values on a per-board
basis.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Acked-by: NWolfgang Denk <wd@denx.de>
Tested-by: NPeter Tyser <ptyser@xes-inc.com>
Acked-by: NPeter Tyser <ptyser@xes-inc.com>

This patch adds the possibility to call a board specific
i2c bus reset routine for the fsl_i2c bus driver, and adds
this option for the keymile kmeter1 board.

The deblock sequence for this board is implemented and
tested in the following way:

CR = 0x20 (release SDA and SCL pin)
CR = 0xa0 (start read)
dummy read
dummy read
if 2. dummy read == 0x00
	3. dummy read

CR = 0x80 (SDA and SCL now 1 SR = 0x86)
CR = 0x00 (Modul reset SR=0x81)
CR = 0x80 (SDA and SCL = 1, SR = 0x81)
Signed-off-by: NHeiko Schocher <hs@denx.de>

This patch adds I2C mux support for the fsl_i2c driver. This
allows you to add "new" i2c busses, which are reached over
i2c muxes. For more infos, please look in the README and
search for CONFIG_I2C_MUX.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

All implementations of the functions i2c_reg_read() and
i2c_reg_write() are identical. We can save space and simplify the
code by converting these functions into inlines and putting them in
i2c.h.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Acked-By: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: NTrent Piepho <tpiepho@freescale.com>
Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

The existing I2C freqency dividers for FDR does not apply
to ColdFire platforms; thus, a seperate table is added
based on MCF5xxx Reference Manual
Signed-off-by: NLuigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: NTsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: NTabi Timur <timur@freescale.com>

Signed-off-by: NMichal Simek <monstr@monstr.eu>

Signed-off-by: NStefan Roese <sr@denx.de>

The current implementation of get_timer() is only really useful after we
have relocated u-boot to memory.  The i2c code is used before that as part
of the SPD DDR setup.

We actually have a bug when using the get_timer() code before relocation
because the .bss hasn't been setup and thus we could be reading/writing
a random location (probably in flash).
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Prevent i2c_init() in fsl_i2c.c from writing to the data segment before
relocation.  Commit d8c82db4 added the ability for i2c_init() to program the
I2C bus speed and save the value in i2c_bus_speed[], which is a global
variable.  It is an error to write to the data segment before relocation,
which is what i2c_init() does when it stores the bus speed in i2c_bus_speed[].
Signed-off-by: NTimur Tabi <timur@freescale.com>

Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add support to the Freescale I2C driver (fsl_i2c.c) for setting and querying
the I2C bus speed.  Current 8[356]xx boards define the CFG_I2C_SPEED macro,
but fsl_i2c.c ignores it and uses conservative value when programming the
I2C bus speed.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Acked-by: NAndy Fleming <afleming@freescale.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

The i2c_init() function in fsl_i2c.c programs the two I2C busses differently.
The second I2C bus has its slave address programmed incorrectly and is
missing a 5-us delay.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Fix empty i2c reads/writes, i2c_write(0x50, 0x00, 0, NULL, 0)
which is used to se if an slave will ACK after receiving its address.

Correct i2c probing to use this method as the old method could upset
a slave as it wrote a data byte to it.

Add a small delay in i2c_init() to let the controller
shutdown any ongoing I2C activity.
Signed-off-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se>

Signed-off-by: NTimur Tabi <timur@freescale.com>

Signed-off-by: NTimur Tabi <timur@freescale.com>

Update the 83xx tree to use I2C support in drivers/fsl_i2c.c.  Delete
cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files.
Added multiple I2C bus support to fsl_i2c.c.
Signed-off-by: NTimur Tabi <timur@freescale.com>

Introduced COFIG_FSL_I2C to select the common FSL I2C driver.
And removed hard i2c path from a few u-boot.lds scipts too.
Minor whitespace cleanups along the way.
Signed-off-by: NJon Loeliger <jdl@freescale.com>

conditional expressions instead.

Use consistent return code 0/-1 for good/bad indicators.

Include one fewer file if the driver isn't used at all.
Signed-off-by: NJon Loeliger <jdl@freescale.com>

in an effort to begin to unify the umpteen FSL I2C drivers that
are all otherwise very similar.
Signed-off-by: NJon Loeliger <jdl@freescale.com>

Signed-off-by: NJon Loeliger <jdl@freescale.com>