Add support for reading onboard EEPROM to enable
board detection.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Add Extra env settings.
This is derived from am335x Extra ENV settings.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

AM4372 uses PL310 L2 Cache. Enable the configs for the same.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Use ti_armv7_common.h config file to inclde the common
configs.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

PRCM, timer base addresses and offsets are different from
AM33xx. Updating the same.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Patch f33b9bd3
[arm: omap3: Enable clocks for peripherals only if they are used]
breaks SPL booting on Beagleboard. Since some gpio input's are
read to detect the board revision. But with this patch above, the
clocks to the GPIO subsystems are not enabled per default any more.
The GPIO banks need to be configured specifically now.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>

The PXA incorrectly uses CONFIG_SYS_HZ, which should be 1000 across
U-Boot. Fix this.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>

The CPU complex reset masks are not matching with the datasheet for
the CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET/CLR_0 registers. For both T20
and T30 the register consist of groups of 4 bits, with one bit for
each CPU core. On T20 the 2 high bits of each group are always stubbed
as there is only 2 cores.
Signed-off-by: NAlban Bedel <alban.bedel@avionic-design.de>
Acked-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NStephen Warren <swrren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Add support for the new Tamonten™ NG platform from Avionic Design.
Currently only I2C, MMC, USB and ethernet have been tested.
Signed-off-by: NAlban Bedel <alban.bedel@avionic-design.de>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Create the i2c adapter object for the fifth bus on SoC with more than
4 buses. This allow using all the bus available on T30.
Signed-off-by: NAlban Bedel <alban.bedel@avionic-design.de>
Acked-by: NHeiko Schocher <hs@denx.de>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Add the Tegra30 SKU b1 and treat it like other Tegra30 chips.
Signed-off-by: NAlban Bedel <alban.bedel@avionic-design.de>
Reviewed-by: NJulian Scheel <julian.scheel@avionic-design.de>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Fix the timeout issue after running "bootp" command in u-boot
console. For example you see "EHCI timed out on TD- token=0x...".
TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10
after a controller reset and before RUN bit is set
(per technical reference manual).
Signed-off-by: NJim Lin <jilin@nvidia.com>
Tested-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

u-boot-dtb-tegra.bin and u-boot-nodtb-tegra.bin binaries
are generated only if the SPL build is enabled as they have
dependency on SPL build
Signed-off-by: NVidya Sagar <vidyas@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

I no longer work for Avionic Design and don't have access to hardware,
so I'll pass on maintainership to Alban.
Acked-by: NAlban Bedel <alban.bedel@avionic-design.de>
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

PLLX no longer has the CPCON field on Tegra114, so do not attempt to
program it.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

The M, N and P width have been changed from Tegra30. The maximum value
for N is limited to 255. So, the tegra_pll_x_table for Tegra114 should
be set accordingly.
Signed-off-by: NJimmy Zhang <jimmzhang@nvidia.com>
Reviewed-by: NTom Warren <twarren@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

When DT define aliases for etherner0 and ethernet1, U-Boot
automatically patched MAC addresses using ethaddr and eth1addr
environment variables respectively.

Custom initialization is no longer needed.
Signed-off-by: NSergei Ianovich <ynvich@gmail.com>
CC: Marek Vasut <marex@denx.de>

DT kernel requires CONFIG_OF_LIBFDT. 'bootm' needs to know DT location.
In addition, fix kernel console device and enable U-Boot long help.
Signed-off-by: NSergei Ianovich <ynvich@gmail.com>
CC: Marek Vasut <marex@denx.de>

Initial configuration has worng address of the second chip.
There is an alias for the 1st chip at 0x02000000 in earlier
verions of LP-8x4x, so the boot normally.

However, new LP-8x4xs have a bigger 1st flash chip, and hang on
boot without this patch.
Signed-off-by: NSergei Ianovich <ynvich@gmail.com>
CC: Marek Vasut <marex@denx.de>

Signed-off-by: NSergei Ianovich <ynvich@gmail.com>
CC: Marek Vasut <marex@denx.de>

Erratum 71 of PXA270M Processor Family Specification Update
(April 19, 2010) explains that watchdog reset time is just
8us insead of 10ms in EMTS.

If SDRAM is not reset, it causes memory bus congestion and
the device hangs.

We put SDRAM in selfresh mode before watchdog reset, removing
potential freezes.
Signed-off-by: NSergei Ianovich <ynvich@gmail.com>
CC: Marek Vasut <marex@denx.de>

Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

This supports sh_i2c on koelsch board.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

The koelsch board has one sh-ether device.
This supports sh-ether.
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

The lager board uses I2C for reset.
ned-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

The lager board has I2C for rcar.
This supports I2C for rcar on lager board.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

The lager board has one sh-ether device.
This supports sh-ether.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

Add infomation of Lager and Koelsh board, and R-Car.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

In config_cmd_default.h, it will use CONFIG_SYS_NO_FLASH to decide
whether include CONFIG_CMD_FLASH and CONFIG_CMD_IMLS. So, move the
CONFIG_SYS_NO_FLASH to proper position, then we don't need to undef
these two commands.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

remove unneeded #undef for at91sam9x5ek board.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

As the cs for spi is worked in gpio mode, so no need to configure
it as peripheral and then configure to gpio. Configure it to gpio
directly.
Signed-off-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

As per the latest 0.6 version of DM for OMAP5430 ES2.0,
MPU_GCLK is given as 1000MHz. In order to achieve this DPLL_MPU
should be locked at 2000MHz. Fixing the same and cleaning the
previously used dpll values.
Reported-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Commit "armv7: hw_data: change clock divider setting"
updates the setting for m6 divider for 20MHz sys_clk frequency.
But missed to update for other sys_clk frequencies. Doing the same.
Reported-by: NRajendran, Vinothkumar <vinothr@ti.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

This patch makes the following updates to the cm_t35 config file:
- Replace "ttyS" in default environment kernel bootargs with the new "ttyO"
  notation.
- Remove "omapfb.debug=y" from default environment kernel bootargs.
- Define a minimal power-on delay for USB hub ports so that slow-to-power-on USB
  sticks will have enough time to become responsive.
- Add support for bootz command
- ulpi_reset is not necessary and always fails with the following error message:
  "ULPI: ulpi_reset: failed writing reset bit"
  So, remove it.

Cc: Tom Rini <trini@ti.com>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
Acked-by: NStefan Roese <sr@denx.de>

Pin 30 is connected to PHY's RESET# signal, so it must be
put to high. Otherwise PHY won't be found via MDIO interface.
Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com>

commit 16297cfb
Author: Mateusz Zalega <m.zalega@samsung.com>
Date:   Fri Oct 4 19:22:26 2013 +0200

    usb: new board-specific USB init interface

introduced a new parameter to the dfu command. Adapt the default environment
for the siemens boards.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Mateusz Zalega <m.zalega@samsung.com>

ABB code uses LDELAY but does not include the header that provides its
definition.

Include the header.

Cc: Tom Rini <trini@ti.com>
Signed-off-by: NNikita Kiryanov <nikita@compulab.co.il>
Acked-by: NNishanth Menon <nm@ti.com>