- 16 12月, 2016 5 次提交
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由 Stefan Agner 提交于
Use the same preprocessor define to enable clocks as we use to enable the driver. Make sure that the necessary PLL's are on (they get enabled by boot ROM by default, so this is more for completness). Signed-off-by: NStefan Agner <stefan.agner@toradex.com>
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由 Stefan Agner 提交于
Use device-tree fixup to communicate the MTD partitions to the kernel. U-Boot's mtdparts environment variable will be used as partition source for the device-tree based partition table too. Signed-off-by: NStefan Agner <stefan.agner@toradex.com>
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由 Stefan Agner 提交于
The config block support currently uses the ft_board_setup function to patch the device tree with config block information. However, this does not allow to patch the device tree with board specific information. Rename the common setup function to ft_common_board_setup and use the call it from the board files directly. Signed-off-by: NStefan Agner <stefan.agner@toradex.com>
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由 Stefan Agner 提交于
Use the proper config option to guard the USB Download Function fixup callback. Signed-off-by: NStefan Agner <stefan.agner@toradex.com>
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- 13 12月, 2016 1 次提交
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由 Lukasz Majewski 提交于
Despite I leave Samsung by the end of the year, I'm going to maintain DFU in u-boot. Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
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- 12 12月, 2016 12 次提交
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由 Lukasz Majewski 提交于
Since I leave Samsung by the end of the year, I will not have access to OneNAND devices anymore. Hence the custodian position has been marked as "Orphaned". Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
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由 Konstantin Porotchkin 提交于
Enable hush parser in Armada-7040 and Armada-8040 DB default configurations. Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Konstantin Porotchkin 提交于
Enable PCIe bus support in Armada-7040 DB default configuration Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Konstantin Porotchkin 提交于
Add missing L3 cache flush functionality which absence prevents Linux kernel from normal boot in case the L3 cache is enabled by ATF. The L3 cache is named the "last level" cache in order to keep the terminology similar to the ATF code. This cache should not be disabled by u-boot since the Linux kernel cannot activate it, so it is activates at ATF stage. However the cache flush is required for preventing data corruption after disabling the MMU and the data cache before passing control to the loaded Linux image. Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Konstantin Porotchkin 提交于
Enable mvebu pin control support in the default configuration files for Armada-7040 and Armada-8040 development boards Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Konstantin Porotchkin 提交于
Enable mvebu "bubt" command support in the default configuration file for Armada-7040 and Armada-8040 development boards Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Konstantin Porotchkin 提交于
Add pin control nodes to APN806, CP-master, CP-slave and Armada-7040 and Armada-8040 boards DTS files Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Konstantin Porotchkin 提交于
Add a DM port of Marvell pin control driver. The A8K SoC family contains several silicone dies interconnected in a single package. Every die is normally equipped with its own pin controller unit. There are 2 pin controllers in A70x0 SoC and 3 in A80x0 SoC. Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Konstantin Porotchkin 提交于
Add support for mvebu bubt command for flash image load, check and burn on boot device. Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com> Reviewed-by: NStefan Roese <sr@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Konstantin Porotchkin 提交于
Align the Armada-8040-db and Armada-7040-db SPI and I2C DTS settings with latest DB settings: - 8040-db: disable i2c0 and spi0 on AP (MPPs are reserved for SDIO) - 8040-db: disable cps_i2c0 on CP1 - 8040-db: enable spi1 on CP1 (the new location of the boot flash) The spi1 on CP1 is aliased as spi0 since this is the way the driver enumerates it. Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com> Reviewed-by: NStefan Roese <sr@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: NStefan Roese <sr@denx.de>
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- 11 12月, 2016 2 次提交
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由 Masahiro Yamada 提交于
This is a user configurable option, but "select BLK" forces users to enable it. Even with this commit, BLK is still enabled by "default y if DM_MMC" for UniPhier SoCs; the difference is users can disable it if they do not need it. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
Sync with the latest kernel. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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- 10 12月, 2016 6 次提交
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由 Tom Rini 提交于
Cover all of the boston and malta variations. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Jyri Sarha 提交于
Initialize EMIF OCP_CONFIG registers REG_COS_COUNT_1, REG_COS_COUNT_2, and REG_PR_OLD_COUNT field for Beaglebone-Black and am335x-evm. With the default values LCDC suffers from DMA FIFO underflows and frame synchronization lost errors. The initialization values are the highest that work flawlessly when heavy memory load is generated by CPU. 32bpp colors were used in the test. On BBB the video mode used 110MHz pixel clock. The mode supported by the panel of am335x-evm uses 30MHz pixel clock. Signed-off-by: NJyri Sarha <jsarha@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Christian Riesch 提交于
Signed-off-by: NChristian Riesch <christian@riesch.at> Cc: Manfred Rudigier <manfred.rudigier@omicronenergy.com> Cc: Christoph Rüdisser <christoph.ruedisser@omicronenergy.com>
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由 Masahiro Yamada 提交于
Do not overwrite the memory nodes in the kernel DT where some parts of the memory region might be carved out. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
Just a cosmetic cleanup. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
This will be used to store the return value of readl(). Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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- 09 12月, 2016 14 次提交
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由 Tom Rini 提交于
First, there are a number of features in newer QEMU that will allow us to test a wider range of platforms, so we want to use at least v2.8.0. Second, making use of a PPA for QEMU fails from time to time. So we change to checking out and building a copy of QEMU when we know that we are going to use test.py and need QEMU to be installed. This adds around 4 minutes per test.py job that we run. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Michal Simek 提交于
The patch is fixing: "tools: mkimage: Check if file is regular file" (sha1: 56c7e801) which contains two issues reported by Coverity Unchecked return value from stat and incorrect calling sequence where attack can happen between calling stat and fopen. Using pair in opposite order (fopen and fstat) is fixing this issue because fstat is using the same file descriptor (FILE *). Also fixing issue with: "tools: mkimage: Add support for initialization table for Zynq and ZynqMP" (sha1: 3b646080) where file wasn't checked that it is regular file. Reported-by: Coverity (CID: 154711, 154712) Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Fabien Parent 提交于
Stop booting legacy uImage and now boot zImage. Signed-off-by: NFabien Parent <fparent@baylibre.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Andrew F. Davis 提交于
Currently we let U-Boot find a spot at the end of DRAM at runtime, this forces us to build an OPTEE image based on the size of DRAM for an EVM. Add a default address that works across all current AM57xx EVMs. Signed-off-by: NAndrew F. Davis <afd@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Andrew F. Davis 提交于
Currently we let U-Boot find a spot at the end of DRAM at runtime, this forces us to build an OPTEE image based on the size of DRAM for an EVM. Add a default address that works across all current DRA7xx EVMs. Signed-off-by: NAndrew F. Davis <afd@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Fabien Parent 提交于
The configuration used to error correction was not in line with what linux and the ROM code is using. Fix it by using the correct configuration. Now u-boot and the SPL are able to read correctly anything written by them. Signed-off-by: NFabien Parent <fparent@baylibre.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Fabien Parent 提交于
A size of 0x200 seems way too short for u-boot. Increase the size to 512k. Signed-off-by: NFabien Parent <fparent@baylibre.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Yehuda Yitschak 提交于
Currently the PCI command only allows to see the BAR register values but not the size and actual base address. This little extension parses the BAR registers and displays the base, size and type of each BAR. Signed-off-by: NYehuda Yitschak <yehuday@marvell.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This function is not used anymore. Drop it. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This function is not used anymore. Drop it. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This function is not used anymore. Drop it. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This task can be handled by inline code now. Drop this function. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Rather than have this function figure out the correct loader again, pass it in as a parameter. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Create a boot_from_devices() function to handle trying each device. This helps to reduce the size of the already-large board_init_r() function. Signed-off-by: NSimon Glass <sjg@chromium.org>
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