Rework the waiting for transfer completion loop condition
to continue waiting until both Transfer Complete and DMA End
interrupts occur. Checking of DLA bit in Present State register
looks not needed in addition to interrupts status checking,
so it can be removed from the condition. Also, DMA Error
condition is added to the list of data errors, checked in the loop.
Signed-off-by: NAndrew Gabbasov <andrew_gabbasov@mentor.com>

The cache should invalidate the read buffer for
the SD card interface after the transfer complete,
not command-complete.
Tested-by: NAndrew Gabbasov <Andrew_Gabbasov@mentor.com>
Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>

The glitch in the SPI clock line, which commit 3cea335c (spi: mxc_spi: Fix spi
clock glitch durant reset) solved, is back now and itwas re-introduced by
commit d36b39bf (spi: mxc_spi: Fix ECSPI reset handling).

Actually the glitch is happening due to always toggling between slave mode
and master mode by configuring the CHANNEL_MODE bits in this reset function.

Since the spi driver only supports master mode, set the mode for all channels
always to master mode in order to have a stable, "glitch-free" SPI clock line.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
Acked-by: NFabio Estevam <fabio.estevam@freescale.com>

Reviewing the ECSPI reset handling shows two issues:

1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg
   (ECSPIx_CONGREG) the i.MX6 technical reference manual states:

   -- cut --
   ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block
   and resets the internal logic with the exception of the ECSPI_CONREG.
   -- cut --

   Note the exception mentioned: The CONREG itself isn't reset.

   Fix this by manually writing the reset value 0 to the whole register.
   This sets the EN bit to zero, too (i.e. includes the old
   ~MXC_CSPICTRL_EN).

2. We want to reset the whole SPI block here. So it makes no sense
   to first read the old value of the CONREG and write it back, later.
   This will give us the old (historic/random) value of the CONREG back.
   And doesn't reset the CONREG.

   To get a clean CONREG after the reset of the block, too, don't use
   the old (historic/random) value of the CONREG while doing the reset.
   And read the clean CONREG after the reset.

This was found while working on a SPI boot device where the i.MX6 boot
ROM has already initialized the SPI block. The initialization by the
boot ROM might be different to what the U-Boot driver wants to configure.
I.e. we need a clean reset of SPI block, including the CONREG.
Signed-off-by: NDirk Behme <dirk.behme@de.bosch.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>

board/freescale/mx6qsabrelite/README explain a procedure to
update the SPI-NOR on the SabreLite board without Freescale
manufacturing tool but following this procedure leads to both
"sf erase" and "sf write" failing on a mx6qsabrelite board:

MX6QSABRELITE U-Boot > sf probe 1
MX6QSABRELITE U-Boot > sf erase 0 0x40000
SPI flash erase failed
MX6QSABRELITE U-Boot > sf write 0x10800000 0 0x40000
SPI flash write failed

This is because the chip-select 1 is wrong and the correct
value is 0x7300.

Since commit c1173bd0 ("sf command: allow default bus and chip selects")
the chip-select and bus arguments for the sf probe command are optional
so let's just remove it and use "sf probe" instead.
Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>

CONFIG_SYS_FSL_USDHC_NUM is not used for wandboard.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NOtavio Salvador <otavio@ossystems.com.br>

No need to call 'mmc dev' twice.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NOtavio Salvador <otavio@ossystems.com.br>

No need to call 'mmc dev' twice.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NOtavio Salvador <otavio@ossystems.com.br>

When booting a Freescale kernel 3.0.35 on a Wandboard solo, the get_board_rev()
returns 0x62xxx, which is not a value understood by the VPU
(Video Processing Unit) library in the kernel and causes the video playback to
fail.

The expected values for get_board_rev are:
0x63xxx: For mx6quad/dual
0x61xxx: For mx6dual-lite/solo

So adjust get_board_rev() accordingly and make it as weak function, so that we
do not need to define it in every mx6 board file.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NDirk Behme <dirk.behme@de.bosch.com>
Acked-by: NEric Nelson <eric.nelson@boundarydevices.com>

The netargs variable was referencing the non-existing variable
console_mainline. Change that to console variable instead.
Signed-off-by: NAlexandre Pereira da Silva <aletes.xgr@gmail.com>
Acked-by: NOtavio Salvador <otavio@ossystems.com.br>

Maximum bus width supported by some i.MX6 boards is not 8bit like
others. In case where both host controller and card support 8bit transfers,
they agree to communicate on 8bit interface while some boards support only 4bit interface.
Due to this reason the mmc 8bit default mode fails on these boards. To rectify this,
define maximum bus width supported by these boards (4bit). If max_bus_width is not
defined, it is 0 by default and 8bit width support will be enabled in host
capabilities otherwise host capabilities are modified accordingly.

It is tested with a MMCplus card.
Signed-off-by: NAbbas Raza <Abbas_Raza@mentor.com>
cc: stefano Babic <sbabic@denx.de>
cc: Andy Fleming <afleming@gmail.com>
Acked-by: NDirk Behme <dirk.behme@de.bosch.com>
Acked-by: NAndrew Gabbasov <andrew_gabbasov@mentor.com>

Change all "#define/ifdef<TAB>" sequences into "#define/ifdef<SPACE>".
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>

The mx25pdk board supports the i.MX25 DryIce RTC (imxdi), so enable it. This
allows to compile-test the imxdi driver in the mainline tree.
Signed-off-by: NBenoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: NFabio Estevam <fabio.estevam@freescale.com>

The u-boot.imx binary is generated by default, so no need to pass it in the
'make' line.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Introduce 'mx28evk_nand' target for saving environment variables into NAND.

The mx28evk board does not come with a NAND flash populated from the
factory. It comes with an empty slot (U23), which allows the insertion of a
48-pin TSOP flash device.

Tested with a K9LBG08U0D.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: NOtavio Salvador <otavio@ossystems.com.br>

Adds support for 'bmode' command which let user to choose where to
boot from; this allows U-Boot to load system from another storage
without messing with jumpers.
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>

This changes the code so in case an unkown value is passed it will
return as invalid.
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>

This documents the SD card identifier so it is easier for user to spot
which card number will be used, if need.
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>

Wandboard is a development board that has two variants: one version based
on mx6 dual lite and another one based on mx6 solo.

For more details about Wandboard, please refer to: http://www.wandboard.org/Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Nothing on the SABRE Lite board warrants a shorter than normal
ARP timeout.
Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>

Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>
Acked-by: NStefano Babic <sbabic@denx.de>

When loading a Freescale 2.6.35 on a mx28evk the following issue is seen:

sgtl5000_hw_read: read reg error : Reg 0x00
Device with ID register 0 is not a SGTL5000

Disabling CONFIG_CMD_I2C makes the sgtl5000 probe to succeed.

Mainline kernel does not show this problem.

Until the real cause is not identified, disable 'CONFIG_CMD_I2C' for the
time being.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

The i.MX6 common timer uses the 32-bit variable tbl (time base lower)
to record the overflow of the 32-bit counter. I.e. if the counter
overflows, the variable tbl does overflow, too.

To capture this overflow, use the variable tbu (time base upper), too.
Return the combined value of tbl and tbu.

lastinc is unused then, remove it.
Signed-off-by: NKnut Wohlrab <knut.wohlrab@de.bosch.com>
Signed-off-by: NDirk Behme <dirk.behme@de.bosch.com>
Acked-by: NStefano Babic <sbabic@denx.de>

No need to use multi-line style comments for single-line contents.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: NOtavio Salvador <otavio@ossystems.com.br>

Currently the following kernel hang happens when loading a 2.6.35 kernel from
Freeescale on a mx28evk board:

RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
Bus freq driver module loaded
IMX usb wakeup probe
usb h1 wakeup device is registered
mxs_cpu_init: cpufreq init finished
...

Loading the same kernel using the bootlets from the imx-bootlets-src-10.12.01
package, the hang does not occur.

Comparing the DDR2 initialization from the bootlets code against the U-boot
one, we can notice some mismatches, and after applying the same initialization
into U-boot the 2.6.35 kernel can boot normally.

Also tested with 'mtest' command, which runs succesfully.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NOtavio Salvador <otavio@ossystems.com.br>
Tested-by: NMarek Vasut <marex@denx.de>

When building for the nitrogen boards with 2GiB the following warning happens:

nitrogen6x.c:89:38: warning: integer overflow in expression [-Woverflow]

2GiB can not fit in 32-bits, so use ulong instead.
Reported-by: NAlbert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Fix the following build error when buildig nitrogen6s1g:

nitrogen6x.c:89:17: error: 'CONFIG_DDR_MB' undeclared (first use in
this function)
nitrogen6x.c:89:17: note: each undeclared identifier is reported only
once for each function it appears in
Reported-by: NAlbert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>

Pad config registers exist in APB_MISC_GP space, and control slew
rate, drive strengh, schmidt, high-speed, and low-power modes for
all of the pingroups in Tegra30. This builds off of the pinmux
way of constructing init tables to configure select pads (SDIOCFG,
for instance) during pinmux_init().

Currently, no padcfg entries exist. SDIO3CFG will be added when the
MMC driver is added as per the TRM to work with the SD-card slot on
Dalmore E1611.
Signed-off-by: NTom Warren <twarren@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>

All other Tegra boards have their alias nodes in the .dts file
Signed-off-by: NTom Warren <twarren@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>

The pinmux code issues a warning if the caller attempts to disable the
lock bit in a pinmux register, since this is impossible (once it's
locked, the only way to unlock it is to reset the device/pmt controller).

The I2C/DDC/CEC/USB macros expect a lock setting to be passed in,
and the previous setting of DISABLE caused the pinmux table parsing
code to issue the warning. Changing the lock bits in these table
entries to DEFAULT (i.e. don't touch it) fixes this.
Signed-off-by: NTom Warren <twarren@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>

Differences in padcfg registers (some removed, some added) between
Tegra30 and Tegra114 weren't picked up when I first ported this file.
Signed-off-by: NTom Warren <twarren@nvidia.com>

This caused CAM_MCLK's pinmux reg to be locked out, since the
table parsing code couldn't find a matching entry for VI_ALT3
and wrote garbage to the register.
Signed-off-by: NTom Warren <twarren@nvidia.com>

Enable a common set of partition types, filesystems, and related
commands in tegra-common.h, so that they are available on all Tegra
boards. This allows boot.scr (loaded and executed by the default
built-in environment) on those boards to assume that certain features
are always available.

Do this in tegra-common.h, so that individual board files can undefine
the features if they really don't want any of them.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Various code that is conditional upon HAVE_BLOCK_DEVICE is required by
code conditional upon CONFIG_CMD_PART. So, enable HAVE_BLOCK_DEVICE if
CONFIG_CMD_PART is enabled.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Acked-by: NTom Rini <trini@ti.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

This set of ifdefs is used in a number of places. Move its definition
somewhere common so it doesn't have to be repeated.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Acked-by: NTom Rini <trini@ti.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

All Tegra devices will need CONFIG_BOUNCE_BUFFER. Move it to
tegra-common.h to ensure it's always set.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Tested on my Cardhu-A04 tablet, eMMC and SD-Card work fine, can load
a kernel off of an SD card OK, card detect works, and the env is now
stored in eMMC (end of the 2nd 'boot' sector, same as Tegra20).
Signed-off-by: NTom Warren <twarren@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>