- 12 5月, 2021 1 次提交
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由 Vignesh Raghavendra 提交于
Sync BCDMA and PKTDMA support from Kernel for AM64 SoC Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>
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- 13 12月, 2020 1 次提交
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由 Simon Glass 提交于
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 12 10月, 2020 1 次提交
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由 Vignesh Raghavendra 提交于
Reset the channel completely during channel release in order to clear teardown bit before handing over to next user or jumping to Linux. Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
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- 13 7月, 2020 4 次提交
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由 Vignesh Raghavendra 提交于
We only request ring pairs via K3 DMA driver, switch to use the new k3_ringacc_request_rings_pair() to simplify the code. As a good side effect, all boot stages now use exposed RING mode which avoid maintaining proxy mode for 32 bit R5 core. Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>
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由 Vignesh Raghavendra 提交于
In K3 UDMA architecture, RX rings are associated with RX flows rather than RX channels, therefore move the ring pointers to udma_rflow struct Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>
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由 Vignesh Raghavendra 提交于
Encapsulate channel configuration in a separate struct so as to ease resetting of these fields with memset() and also to increase readability of the code. Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>
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由 Vignesh Raghavendra 提交于
Update driver to use static PSIL endpoint Data instead of DT. This will allow DT bindings to be in sync with kernel's DT. Note that this patch breaks networking and OSPI boot as driver changes are not backward compatible with existing DT. Subsequent commit will update the DT to make it compatible with updated driver. Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
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- 19 5月, 2020 3 次提交
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由 Simon Glass 提交于
Move this uncommon header out of the common header. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this header out of the common header. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 03 3月, 2020 1 次提交
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由 Lokesh Vutla 提交于
When flow id is not marked as valid, sysfw reads the register value to get the range of flow ids that are supported. Then compares the flow range with the U-Boot's host id. This will definitely fail as board configuration doesn't assign the full range to U-Boot's host id. In order to work around this, mark the flow id as valid and pass range as 0. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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- 19 2月, 2020 1 次提交
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由 Masahiro Yamada 提交于
The implementation of dma_map_single() and dma_unmap_single() is exactly the same for all the architectures that support them. Factor them out to <linux/dma-mapping.h>, and make all drivers to include <linux/dma-mapping.h> instead of <asm/dma-mapping.h>. If we need to differentiate them for some architectures, we can move the generic definitions to <asm-generic/dma-mapping.h>. Add some comments to the helpers. The concept is quite similar to the DMA-API of Linux kernel. Drivers are agnostic about what is going on behind the scene. Just call dma_map_single() before the DMA, and dma_unmap_single() after it. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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- 06 2月, 2020 3 次提交
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由 Simon Glass 提交于
At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NAnatolij Gustschin <agust@denx.de>
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由 Simon Glass 提交于
This function name conflicts with our desire to #define free() to something else on sandbox. Since it deals with resources, rename it to rfree(). Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 20 1月, 2020 6 次提交
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由 Vignesh Raghavendra 提交于
Cast pointers properly so as to avoid warnings when driver is built for 32 bit platforms Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Vignesh Raghavendra 提交于
UDMA always expects 64 bit address pointer of the transfer descriptor in the Ring. But on 32 bit cores like R5, pointer is always 32 bit in size. Therefore copy over 32 bit pointer value to 64 bit variable before pushing it over to the ring, so that upper 32 bits are 0s. Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Vignesh Raghavendra 提交于
Exposed ring mode works well with 32 bit and 64 bit cores without need for Proxies for 32 bit cores. Therefore switch to exposed ring mode. Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Vignesh Raghavendra 提交于
Fix up the debug prints that were dumping state of TCHAN RT registers to use tchan for MEM_TO_DEV transfers. Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Vignesh Raghavendra 提交于
Remove redundant coherency checks before calling cache ops in UDMA driver. This is now handled in arch specific cache operation implementation based on Kconfig option Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Vignesh Raghavendra 提交于
On K3 SoCs, DMA channels are shared across multiple entities, therefore U-Boot DMA driver needs to query resource range from centralised resource management controller i.e SystemFirmware and use DMA channels allocated for A72 host. Add support for the same. Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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- 09 12月, 2019 2 次提交
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由 Vignesh Raghavendra 提交于
Add new compatible to handle J721e SoC Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
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由 Vignesh Raghavendra 提交于
Implement dma_get_cfg() interface to pass flow id information for DMA clients to use. This is needed because on K3 SoCs, CPSW (ethernet) and UDMA (DMA provider) support "flows" within a given RX DMA channel. This allows different network packets to be segregated while using same RX DMA channel. In order for basic ethernet to work, CPSW slave must be aware of the flow ID allocated for the RX channel by the DMA driver. This interface allows CPSW to query flow ID from DMA provider and configure it in CPSW HW. Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
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- 03 12月, 2019 1 次提交
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由 Simon Glass 提交于
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 03 5月, 2019 2 次提交
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由 Peter Ujfalusi 提交于
Upcoming sysfw (2019.03) will not open the channelized firewalls during init, it only going to do so in response to the channel configuration message. Remove the channel state checks done before the channel configuration and move it after the configuration for warning purposes. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
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由 Keerthy 提交于
Currently packet data is wrongly extracted when metadata is NULL. Fix it and negate the if check. Signed-off-by: NKeerthy <j-keerthy@ti.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
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- 12 4月, 2019 1 次提交
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由 Vignesh R 提交于
The UDMA-P is intended to perform similar (but significantly upgraded) functions as the packet-oriented DMA used on previous SoC devices. The UDMA-P module supports the transmission and reception of various packet types. The UDMA-P also supports acting as both a UTC and UDMA-C for its internal channels. Channels in the UDMA-P can be configured to be either Packet-Based or Third-Party channels on a channel by channel basis. The initial driver supports: - MEM_TO_MEM (TR mode) - DEV_TO_MEM (Packet mode) - MEM_TO_DEV (Packet mode) Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NVignesh R <vigneshr@ti.com>
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