- 09 5月, 2019 15 次提交
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由 Stefan Roese 提交于
This patch enables CONFIG_BLK to remove this compile warning: ===================== WARNING ====================== This board does not use CONFIG_DM_USB. Please update the board to use CONFIG_DM_USB before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== Signed-off-by: NStefan Roese <sr@denx.de>
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由 Stefan Roese 提交于
This patch enables CONFIG_BLK and some DM enabled drivers on clearfog to remove these compile warnings: ===================== WARNING ====================== This board does not use CONFIG_DM_MMC. Please update the board to use CONFIG_DM_MMC before the v2019.04 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== ===================== WARNING ====================== This board does not use CONFIG_DM_USB. Please update the board to use CONFIG_DM_USB before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== ===================== WARNING ====================== This board does use CONFIG_LIBATA but has CONFIG_AHCI not enabled. Please update the storage controller driver to use CONFIG_AHCI before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== Signed-off-by: NStefan Roese <sr@denx.de>
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git://git.denx.de/u-boot-sunxi由 Tom Rini 提交于
- H6 Beelink GS1 board (Clément) - Olimex A64-Teres-I board (Jonas) - sunxi build fix for CONFIG_CMD_PXE|DHCP (Ondrej) - Change include order (Jagan) - EPHY clock changes (Jagan) - EMAC enablement on Cubietruck Plus, BPI-M3 (Chen-Yu Tsai)
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由 Chen-Yu Tsai 提交于
The Bananapi M3 has an RTL8211E PHY connected to the EMAC using RGMII. The PHY is powered by DCDC1 through SW @ 3.3V. The board is designed to use 3.3V with RGMII, instead of the standard reduced voltage of 2.5V we see everywhere. DLDO3, which provides the I/O voltages, is raised to match. This patch enables the EMAC and Realtek PHY drivers in the defconfig. The device tree file already has the EMAC enabled. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Chen-Yu Tsai 提交于
The Cubietruck Plus has an RTL8211E PHY connected to the EMAC using RGMII. The PHY is powered by DLDO4 @ 3.3V, while the I/O pins are powered by DLDO3 @ 2.5V. This patch enables the EMAC and Realtek PHY drivers in the defconfig. The device tree file already has the EMAC enabled. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jonas Smedegaard 提交于
Olimex A64-Teres-I board is a mainboard (the only one so far) for Olimex Teres-I DIY laptop kit. Key features: - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 2GB DDR3 RAM - MicroSD Slot - 16GB eMMC Flash - eDP LCD display - HDMI - USB Host - Battery management - 5V DC power supply - Certified Open Source Hardware (OSHW) Works: - i2C - MMC/SD - PWM backlight Known broken: - Internal keyboard (seems to be because the keyboard firmware loads a bootloader first, and then disconnects bootloader and connect real keyboard). External ones connected to the USB port work fine. This patch enables support for the A64-Teres-I board to u-boot, including enabling screen backlight (lacking from Linux device-tree). Linux commit details about the sun50i-a64-teres-i.dts sync: "arm64: dts: allwinner: a64: Rename uart0_pins_a label to uart0_pb_pins" (sha1: d91ebb95b96c8840932dc3a10c9f243712555467) Cosmetic warnings regarding whitespace and placement of SPDX notice for dts file was ignored. config and .dtsi file are adapted from pinebook files. Tested-by: NJonas Smedegaard <dr@jones.dk> Signed-off-by: NJonas Smedegaard <dr@jones.dk> Signed-off-by: NIcenowy Zheng <icenowy@aosc.io> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com> [jagan: move board entry in MAINTAINERS file at proper position] Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Add EPHY CLK and RESET support for sun8i_emac driver to enable EPHY TX clock and EPHY reset pins via CLK and RESET framework. Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Lothar Felten <lothar.felten@gmail.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Jagan Teki 提交于
Add sample dm reset test for reset_get_by_index and reset_get_by_index_nodev functionality code. Cc: Stephen Warren <swarren@nvidia.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jagan Teki 提交于
Getting a RESET by index with device is not straight forward for some use-cases like handling clock operations for child node in parent driver. So we need to process the child node in parent probe via ofnode and process RESET operation for child without udevice but with ofnode. So add reset_get_by_index_nodev() and move the common code in reset_get_by_index_tail() to use for reset_get_by_index() Cc: Stephen Warren <swarren@nvidia.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jagan Teki 提交于
Add sample dm clk test for clk_get_by_index and clk_get_by_index_nodev functionality code. Cc: Stephen Warren <swarren@nvidia.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jagan Teki 提交于
clk_get_by_index_tail() now handle common clk get by index code so use it from clk_get_by_indexed_prop(). Cc: Stephen Warren <swarren@nvidia.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Getting a CLK by index with device is not straight forward for some use-cases like handling clock operations for child node in parent driver. So we need to process the child node in parent probe via ofnode and process CLK operation for child without udevice but with ofnode. So add clk_get_by_index_nodev() and move the common code in clk_get_by_index_tail() to use for clk_get_by_index() Cc: Stephen Warren <swarren@nvidia.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jagan Teki 提交于
Like clk_get_by_index, there is requirement for clk_get_by_index_nodev. In this case to make common code functionalities for dev and nodev, clk_get_by_index is trying to get the index of clock by passing ofnode instead of actual dev like current gpio uclass does. In these scenarios with current order of include files the serial_sifive driver is unable to find CONFIG_ENV_SIZE. In file included from arch/riscv/include/asm/u-boot.h:23:0, from include/dm/of.h:10, from include/dm/ofnode.h:12, from include/clk.h:11, from drivers/serial/serial_sifive.c:6: include/environment.h:145:19: error: 'CONFIG_ENV_SIZE' undeclared here (not in a function); did you mean 'CONFIG_CMD_XIMG'? #define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE) So, fix consists of changing the order of include files in serial_sifive.c to include first common.h file. Cc: Anup Patel <Anup.Patel@wdc.com> Cc: Rick Chen <rick@andestech.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Like clk_get_by_index, there is requirement for clk_get_by_index_nodev. In this case to make common code functionalities for dev and nodev, clk_get_by_index is trying to get the index of clock by passing ofnode instead of actual dev like current gpio uclass does. In these scenarios with current order of include files the fu540-prci driver is unable to find CONFIG_ENV_SIZE. In file included from arch/riscv/include/asm/u-boot.h:23:0, from include/dm/of.h:10, from include/dm/ofnode.h:12, from include/clk.h:11, from include/clk-uclass.h:13, from drivers/clk/sifive/fu540-prci.c:32: include/environment.h:145:19: error: 'CONFIG_ENV_SIZE' undeclared here (not in a function); did you mean 'CONFIG_CMD_XIMG'? #define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE) So, fix consists of changing the order of include files in fu540-prci.c to include first common.h file. Cc: Anup Patel <Anup.Patel@wdc.com> Cc: Rick Chen <rick@andestech.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Like clk_get_by_index, there is requirement for clk_get_by_index_nodev. In this case to make common code functionalities for dev and nodev, clk_get_by_index is trying to get the index of clock by passing ofnode instead of actual dev like current gpio uclass does. In these scenarios with current order of include files the atcspi200_spi driver is unable to find CONFIG_ENV_SIZE. In file included from arch/nds32/include/asm/u-boot.h:24, from include/dm/of.h:10, from include/dm/ofnode.h:12, from include/clk.h:11, from drivers/spi/atcspi200_spi.c:9: include/environment.h:145:19: error: 'CONFIG_ENV_SIZE' undeclared here (not in a function); did you mean 'CONFIG_CMD_XIMG'? #define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE) So, fix consists of changing the order of include files in atcspi200_spi.c to include first common.h file. Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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- 08 5月, 2019 25 次提交
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git://git.denx.de/u-boot-x86由 Tom Rini 提交于
- Allow x86 boards to use TPL, SPL and U-Boot proper - Update sysreset x86 driver to utilize ACPI registers to do power off - Add a new chromebook_samus_tpl board for TPL support - Several minor changes in binman tool
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git://git.denx.de/u-boot-efi由 Tom Rini 提交于
Pull request for UEFI sub-system for v2019.07-rc2 (2) Fix a bunch of errors in the UEFI sub-system: * implement missing UnloadImage(), * implement missing RegisterProtocolNotify(), * unload images in Exit(), * parameter checks. Provide a unit test for UnloadImage(). Remove a redundant function for unit tests. Clean up the UEFI sub-system initialization
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由 Simon Glass 提交于
Add a version of samus which supports booting from TPL to SPL and then to U-Boot. This allows TPL to select from an A or B SPL to support verified boot with field upgrade. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Add nvdata drivers for the TPM and RTC as used on samus. These are needed for Chromium OS verified boot on samus. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Add tags to allow required nodes to be present in SPL / TPL. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Add the required CPU code so that TPL builds correctly. Also update the SPL code to deal with being booted from TPL. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
When TPL finishes it needs to jump to SPL with the stack set up correctly. Add a function to handle this. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
This is again too small, so increase it slightly. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
The early init should only happen once. Update the probe method to deal with TPL, SPL and U-Boot proper. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
With the move to Kconfig this option should be set in Kconfig, not in the config header file. Move it. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
With the use of a phandle we can outdent the device tree nodes a little. Fix this. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
The standard image generated by U-Boot on x86 is u-boot.rom. Add a separate image called image.bin for verified boot. This supports verification in TPL of which SPL/U-Boot to start, then jumping to the correct one, with SPL setting up the SDRAM and U-Boot proper providing the user interface if needed. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Add TPL binaries to the device x86 binman desciption. When enabled, TPL will start first, doing the 16-bit init, then jump to SPL and finally U-Boot proper. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
There are quite a few variables which control where things appear in the final ROM image. Add a flashmap in the documentation to make this easier to figure out. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> [bmeng: squashed "x86: Update the memory map a little" in] [bmeng: fixed typo of 'documentation' in the commit title] Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
When TPL is in use, U-Boot proper should support initing the VGA ROM even though the 32-bit init portion is in SPL. Update the condition to handle this. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
This report is normally generated by U-Boot proper. Correct the condition here so that it respects the Kconfig options for bootstage. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
The MTRRs are normally set up in U-Boot proper, so avoid setting them up in SPL as well. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Update the Makefie rules to ensure that the correct files are built when TPL is being used. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Add a default implementation of this method which always indicates that the last reset was a power-on reset. This is the most likely type of reset and without a PCH-specific driver we cannot determine any other type. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
On modern x86 devices we can power the system off using the power- management features of the PCH. Add an implementation for this. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
The EFI implementation of reset sits inside the driver and is called directly from outside the driver, breaking the normal driver-model conventions. Worse, it passed NULL as the device pointer, hoping that the called function won't use it, which breaks as soon as code is added to use it. Separate out the implementation to improve the situation enough to allow a future patch to add new sysreset features. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Implement this ioctl() to support power off. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Implement this ioctl() to support power off. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Add a new ioctl() request to read information about the power-management system. This can be used to power off the device. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
When the MRC cache fails to save it is useful to have some debugging info to indicate what when wrong. Add some more debug() calls. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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