Enable option to support more then 4GB memories in single size block.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Use the same binding as is used in mainline Linux kernel.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

For run time serdes adjustment.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Separate register space and put it on more lines.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add some default properties to zynqmp.dtsi.
Signed-off-by: NHyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Reflect actual silicon addresses in DT node names.
Signed-off-by: NHyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Use right addresses for channel names
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Mainline kernel has no r1p12 compatible string that's why console stops
to work with the latest DTS files. Append generic compatible string.
Keep in your mind that using this generic compatible string not all uart
features will be available.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Modifying device tree node to support legacy interrupts.
Signed-off-by: NBharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: NRavi Kiran Gummaluri <rgummal@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

GPIO driver supports an input interrupt that's why gpio node itself can
be labeled as interrupt controller.
Reported-by: NJohn Linn <linnj@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This patch adds ddrc memory controller node in dts.
size mentioned in dts is 0x30000, because we need to access DDR_QOS
INTR registers located at fd090208 from this driver.
Signed-off-by: NNaga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

ZynqMP DMA's main clock and apb clock are added
in zynqmp DT.
Signed-off-by: NVNSL Durga <vnsldurg@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NPunnaiah Choudary Kalluri <punnaia@xilinx.com>

Add CCI-400 node to DTSI.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

ZynqMP is not using global interrupt-parent setting that's why
it has to be listed in every node separately. PMU node missed it and
this patch is adding it.
Reported-by: NJohn Linn <John.Linn@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add power-domains to the DT and attach devices to them.
The power-domains are all logical domains as understood by firmware.
Each PD is identified by a unique identifier that the platform firmware
understands.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This patch adds broken-tuning property to SD and
eMMC nodes.
Signed-off-by: NP L Sai Krishna <lakshmis@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Remove jumbo properties which are handled in the driver directly
and use mainline compatible string which is already handled by the
driver.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This patch add 8-bit bus width property to eMMC node.
Signed-off-by: NP L Sai Krishna <lakshmis@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This patch makes compatible string as "m25p80" for qspi node in
ep108 device tree file
Signed-off-by: NRanjit Waghmode <ranjit.waghmode@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add missing mmc aliases.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Change the dtsi include code to use the C pre-processor #include instead
of the device tree /include/. This brings all ZynqMP device trees inline
with each other.
Signed-off-by: NAlistair Francis <alistair.francis@xilinx.com>
Reviewed-by: NSören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Move kernel and fdt offsets and sizes to board config file
as the flash size varies across boards
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Setup reset off for lthor.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

This is example how to change u-boot to support more memory banks read
from DT.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Remove hardcoded memory sizes. Use information from DT memory node.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Compatible property should be the first.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add missing DT nodes and enable USB.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NNathan Rossi <nathan@nathanrossi.com>

Add missing qspi node and make qspi as spi0.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Sync with others zynq DTS files.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Keep nodes alphabelitally sorted.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NNathan Rossi <nathan@nathanrossi.com>

Add missing adv7511 and configure to match Base TRD.
Signed-off-by: NChristian Kohn <christian.kohn@xilinx.com>
Reviewed-by: NNathan Rossi <nathan@nathanrossi.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add bindings for adv7511.
Signed-off-by: NChristian Kohn <christian.kohn@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Added phy reset gpio information for gem0.
Signed-off-by: NPunnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

- Sync with Linux kernel
- Remove rootfs
- Remove earlyprintk
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

- Have compatible string as the first property
- Sync with Linux kernel dtsi
- Add missing interrupt properties
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Added addtional bindings required for FPGA Manager operation
of the Xilinx Zynq Devc configuration interface.
Signed-off-by: NMoritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Signed-off-by: NMoritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>