ARM64: zynqmp: Added clocks to DT

ZynqMP DMA's main clock and apb clock are added
in zynqmp DT.
Signed-off-by: NVNSL Durga <vnsldurg@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NPunnaiah Choudary Kalluri <punnaia@xilinx.com>

arch/arm/dts/zynqmp.dtsi

@@ -318,6 +318,7 @@
 			reg = <0x0 0xfd500000 0x1000>;
 			interrupt-parent = <&gic>;
 			interrupts = <0 124 4>;
+			clock-names = "clk_main", "clk_apb";
 			xlnx,id = <0>;
 			xlnx,bus-width = <128>;
 			power-domains = <&pd_gdma>;
@@ -329,6 +330,7 @@
 			reg = <0x0 0xfd510000 0x1000>;
 			interrupt-parent = <&gic>;
 			interrupts = <0 125 4>;
+			clock-names = "clk_main", "clk_apb";
 			xlnx,id = <1>;
 			xlnx,bus-width = <128>;
 			power-domains = <&pd_gdma>;
@@ -340,6 +342,7 @@
 			reg = <0x0 0xfd520000 0x1000>;
 			interrupt-parent = <&gic>;
 			interrupts = <0 126 4>;
+			clock-names = "clk_main", "clk_apb";
 			xlnx,id = <2>;
 			xlnx,bus-width = <128>;
 			power-domains = <&pd_gdma>;
@@ -351,6 +354,7 @@
 			reg = <0x0 0xfd530000 0x1000>;
 			interrupt-parent = <&gic>;
 			interrupts = <0 127 4>;
+			clock-names = "clk_main", "clk_apb";
 			xlnx,id = <3>;
 			xlnx,bus-width = <128>;
 			power-domains = <&pd_gdma>;
@@ -362,6 +366,7 @@
 			reg = <0x0 0xfd540000 0x1000>;
 			interrupt-parent = <&gic>;
 			interrupts = <0 128 4>;
+			clock-names = "clk_main", "clk_apb";
 			xlnx,id = <4>;
 			xlnx,bus-width = <128>;
 			power-domains = <&pd_gdma>;
@@ -373,6 +378,7 @@
 			reg = <0x0 0xfd550000 0x1000>;
 			interrupt-parent = <&gic>;
 			interrupts = <0 129 4>;
+			clock-names = "clk_main", "clk_apb";
 			xlnx,id = <5>;
 			xlnx,bus-width = <128>;
 			power-domains = <&pd_gdma>;
@@ -384,6 +390,7 @@
 			reg = <0x0 0xfd560000 0x1000>;
 			interrupt-parent = <&gic>;
 			interrupts = <0 130 4>;
+			clock-names = "clk_main", "clk_apb";
 			xlnx,id = <6>;
 			xlnx,bus-width = <128>;
 			power-domains = <&pd_gdma>;
@@ -395,6 +402,7 @@
 			reg = <0x0 0xfd570000 0x1000>;
 			interrupt-parent = <&gic>;
 			interrupts = <0 131 4>;
+			clock-names = "clk_main", "clk_apb";
 			xlnx,id = <7>;
 			xlnx,bus-width = <128>;
 			power-domains = <&pd_gdma>;