The NOR flash related configure options appear in ls2080aqds.h and
ls2080ardb.h, and the two files both includ ls2080a_common.h.
This patch remove the duplicated options in ls2080a_common.h.
Signed-off-by: NYuan Yao <yao.yuan@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

We have a bunch of boards that define their vendor class identifier and
client archs in the board files or in the distro config. Move everything
to the generic Kconfig options.

We're missing the distinction between i386 and x86_64, as I couldn't find
any config variable that would tell us the difference. Is that really important
to people? I guess not, so I left it out.
Signed-off-by: NAlexander Graf <agraf@suse.de>
Reviewed-by: NTom Rini <trini@konsulko.com>

Update the config.h and defconfig files for the commands that 8e3c036
converted over to Kconfig
Signed-off-by: NTom Rini <trini@konsulko.com>

A number of moveconfig.py runs have left a instances of multiple empty
lines in a row.  Correct this to a single empty line.
Signed-off-by: NTom Rini <trini@konsulko.com>

LS2080A is the primary SoC, and LS2085A is a personality with AIOP
and DPAA DDR. The RDB and QDS boards support both personality. By
detecting the SVR at runtime, a single image per board can support
both SoCs. It gives users flexibility to swtich SoC without the need
to reprogram the board.
Signed-off-by: NYork Sun <york.sun@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NMinkyu Kang <mk7.kang@samsung.com>

Freescale's LS2085A is a another personality of LS2080A SoC with
support of AIOP and DP-DDR.
This Patch adds support of LS2085A Personality.
Signed-off-by: NPratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: Updated MAINTAINERS files
           Dropped #ifdef in cpu.h
           Add CONFIG_SYS_NS16550=y in defconfig]
Reviewed-by: NYork Sun <yorksun@freescale.com>

LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP
personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc.
So renaming existing LS2085A code base to reflect LS2080A (Prime personality)
Signed-off-by: NPratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: Dropped #ifdef in cpu.c for cpu_type_list]
Reviewed-by: NYork Sun <yorksun@freescale.com>

Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Changed MC firmware loading to comply with the new MC boot architecture.
Flush D-cache hierarchy after loading MC images. Add environment
variables "mcboottimeout" for MC boot timeout in milliseconds,
"mcmemsize" for MC DRAM block size. Check MC boot status before calling
flib functions.
Signed-off-by: NJ. German Rivera <German.Rivera@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>

ls2085a_common.h contains hard-coded information for NOR/NAND flash,
I2C, DDR, etc. These are platform specific. Move them out of common
header file and placed into respective board header files.

Move TEXTBASE to 1MB offset to fit NOR flash with up to 1MB sector
size.

Enable command auto complete. Update prompt symbol. Set fdt_high to
0xa0000000 because Linux requires that the fdt  be 8-byte aligned
and below 512 MiB. Besides ensuring compliance with the 512 MiB
limit, this avoids problems with the dtb being misaligned within
the FIT image.

Change the MC FW, MC DPL and Debug server NOR addresses in compliance
with the NOR flash layouts for 128MB flash.

Add PCIe macros. Enable "loadb" command. Disable debug server.
Enable workaround for erratum A008511.
Stop reset on panic for postmortem debugging.
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NBhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>

This patch enusres that right banners are printed for LS2085A
emulator and simulator platforms.
Signed-off-by: NBhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Add support of NOR and NAND flash for simulator target.
Here
  IFC - CS0: NOR flash
  IFC - CS1: NAND flash
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

LS2085A is an ARMv8 implementation. This adds board support for emulator
and simulator:
  Two DDR controllers
  UART2 is used as the console
  IFC timing is tightened for speedy booting
  Support DDR3 and DDR4 as separated targets
  Management Complex (MC) is enabled
  Support for GIC 500 (based on GICv3 arch)
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NArnab Basu <arnab.basu@freescale.com>
Signed-off-by: NJ. German Rivera <German.Rivera@freescale.com>
Signed-off-by: NBhupesh Sharma <bhupesh.sharma@freescale.com>