- 10 5月, 2017 40 次提交
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由 Simon Glass 提交于
Add a function to set the video parameters to the msg handler and remove it from the video driver. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NAnatolij Gustschin <agust@denx.de>
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由 Simon Glass 提交于
Add a function to get the video size to the msg handler and remove it from the video driver. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NAnatolij Gustschin <agust@denx.de>
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由 Simon Glass 提交于
We should not use an embedded device tree on a production board. There does not seem to be any reason for it in commit 76709096. So drop this. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Convert the bcm2835 SDHCI driver over to support CONFIG_DM_MMC and move all boards over. There is no need to keep the old code since there are no other users. Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Move this code into the new message handler file. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
The bcm283x chips provide a way for the ARM core to communicate with the graphics processor, which is in charge of many things. This is handled by way of a message prototcol. At present the code for sending message (and receiving a reply) is spread around U-Boot, primarily in the board file. This means that sending a message from a driver requires duplicating the code. Create a new message implementation with a function to support powering on a subsystem as a starting point. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Enable CONFIG_DM_ETH so that driver model is used for the USB Ethernet device. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Start using driver model for USB on the Raspberry Pi. The dwc2 supports this now so this is just a config change. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This is not needed now that serial uses driver model. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
We can rely on the device tree to provide this information. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
A common use of memmove() can be handled by memcpy(). Also memcpy() includes an optimisation for large sizes: it copies a word at a time. So we can get a speed-up by calling memcpy() to handle our move in this case. Update memmove() to call memcpy() if the destination is before the source. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Simon Glass 提交于
On further review this returns the wrong packet length from the driver. It may not be noticed since protocols will take care of it. Fix it by subtracting the header length from the packet length returned. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Jean-Jacques Hiblot 提交于
Enable disk driver model for dra7xx_evm as dwc_ahci supports driver model. As a consequence we must also enable CONFIG_BLK and CONFIG_DM_USB. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Dropped CONFIG_SPL_PHY=y in sandbox_spl to fix build error: Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Jean-Jacques Hiblot 提交于
Implement a sata driver for Synopsys DWC sata device based on U-boot driver model. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jean-Jacques Hiblot 提交于
This is needed to probe devices under that bus such as the SATA PHY. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jean-Jacques Hiblot 提交于
This phy is found on omap platforms with sata capabilities. Except for the part related to the DM and the PHY framework, the code is basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jean-Jacques Hiblot 提交于
Those tests check: - the ability for a phy-user to get a phy based on its name or its index - the ability of a phy device (provider) to manage multiple ports - the ability to perform operations on the phy (init,deinit,on,off) - the behavior of the uclass when optional operations are not implemented Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jean-Jacques Hiblot 提交于
The PHY framework provides a set of APIs to control a PHY. This API is derived from the linux version of the generic PHY framework. Currently the API supports init(), deinit(), power_on, power_off() and reset(). The framework provides a way to get a reference to a phy from the device-tree. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jean-Jacques Hiblot 提交于
The DM version of scsi_scan() is becoming a bit long, it can be split: scsi_scan() iterates over the IDs and LUNs and for each id/lun pair calls do_scsi_scan_one() to do the work of: - detecting an attached drive - creating the associated block device if a drive is found. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Because the introduction of the pinctrl and clk drivers and the device tree files, remove unneeded hard coded related code from the board file. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Since the introduction of the pinctrl and clk drivers and the device tree files, remove unneeded hard coded related code from the board file. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Since the introduction of the pinctrl and clk drivers and the device tree files, remove unneeded hard coded related code from the board file. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Since the introduction of the pinctrl and clk drivers and the device tree files, remove unneeded hard coded related code from the board file. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Because the limitation of internal SRAM size, the SPL with driver model can't be supported, disable the SPL option. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Since the introduction of the pinctrl and clk driver and the device tree files, remove unneeded related code from the board file. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Because the limitation of internal SRAM size, the SPL with driver model can't be supported, disable the SPL option. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Since the introduction of the pinctrl and clock driver and the device tree files, remove unneeded hard coded related code from the board file. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Update the configuration files to support the device tree and driver model. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Because the limitation of internal SRAM size, the SPL with driver model can't be supported, disable the SPL option. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
The device tree source files of at91sam9263ek boards are copied from the Linux v4.10, do the changes as below. - Add the reg property for the pinctrl node. - Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's slibling nodes, instead of the child nodes. - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used in board_init_f stage. - Fix the compilation warnings. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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