After switching to using the CFI flash driver, the correct remapping
of the flash banks was forgotten.

Also, some boards were not adapted, and the old legacy flash driver
was not removed yet.
Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

This patch is an attempt to implement autoprobing for the Lime
presence on the bus.
Configure GPCM for Lime CS2 and try to access chip ID registers.
Second read atempt delivers register values if the chip is present.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

Signed-off-by: NDetlev Zundel <dzu@denx.de>

netdev.h was not include by r2dplus.
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>

Commit 2a1a2cb6 didnt remove the dummy mem reservation in fdt_chosen,
and this stopped Linux from booting with a Ramdisk. This patch fixes
this, by deleting the useless dummy mem reservation.

When booting with a Ramdisk, a fix offset FDT_RAMDISK_OVERHEAD is now
added to of_size, so we dont need anymore a dummy mem reservation.

I measured the value of FDT_RAMDISK_OVERHEAD on a MPC8270 based
system (=0x44 bytes) and rounded it up to 0x80).
Signed-off-by: NHeiko Schocher <hs@denx.de>
Acked-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NLuigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

This patch deletes oobavail assignments, they're calculated by the nand
core code in nand_scan_tail, plus current oobavail values are wrong for
the LP NANDs.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

This patch implements support for flash-based BBT for chips working
through ELBC NAND controller, so that NAND core will not have to re-scan
for bad blocks on every boot.

Because ELBC controller may provide HW-generated ECCs we should adjust
bbt pattern and bbt version positions in the OOB free area.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

For large page chips, nand_bbt is looking into OOB area, and checking
for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be
reserved for bbt means.

But ELBC driver is specifying ecclayout so that oobfree area starts at
offset 1, so only one byte left for the bbt purposes.

This causes problems with any OOB users, namely JFFS2: after first mount
JFFS2 will fill all OOBs with "erased marker", so OOBs will contain:

  OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

And on the next boot, NAND core will rescan for bad blocks, then will
see "0xff 0x19" pattern, and will mark all blocks as bad ones.

To fix the issue we should implement our own bad block pattern: just one
byte at OOB start. Though, this will work only for x8 chips. For x16
chips two bytes must be checked. Since ELBC driver does not support x16
NANDs (yet), we're safe for now.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NStefan Roese <sr@denx.de>

This patch fixes a problem introdiced with patch
bbeff30c [ppc4xx: Remove superfluous dram_init() call or replace it by
initdram()].

The boards affected are:
- PCI405
- PPChameleonEVB
- quad100hd
- taihu
- zeus
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

This patch prevents linker error on AT91RM9200 boards, if
CONFIG_CMD_I2_TREE is set.
It implements i2c_set_bus_speed and i2c_get_bus_speed as a dummy function.
Signed-off-by: NJens Scharsig <esw@bus-elektronik.de>

ARM DaVinci: Remove duplicate code in cpu/arm926ejs/davinci/dp83848.c
Signed-off-by: NHugo Villeneuve <hugo.villeneuve@lyrtech.com>

__ARM__ is given by arm_config.mk automatically.
Signed-off-by: NShinya Kuribayashi <skuribay@ruby.dti.ne.jp>

Signed-off-by: NClaudio Scordino <claudio@evidence.eu.com>

This patch changes get_timer() for i.MX to return the time since
'base' instead of the time since the counter was at zero.

Symptom seen is flash timeout errors when erasing or programming a
sector using the common cfi flash code.
Signed-off-by: NAndrew Dyer <adyer@righthandtech.com>

1) Change the i.MX serial driver to use the baud rate set in the
 u-boot environment

2) don't assume a 16MHz value for PERCLK1 in baud rate calculations

3) don't write a 1 to the RDR bit in the USR2 reg. (bit is not "write
 one to clear" like other status bits in the reg.)
Signed-off-by: NAndrew Dyer <adyer@righthandtech.com>

Code in cpu/arm920t/start.S will die with a compilation error if
CONFIG_STACKSIZE + CFG_MALLOC_LEN works out to an invalid constant for
the ARM sub instruction.  Change the code so that each is subtracted
independently to avoid the error.
Signed-off-by: NAndrew Dyer <adyer@righthandtech.com>

- Correct Invalid #define of MPUTIM_PTV_MASK for
   omap1510 & omap730 register definition

 MPUTIM_PTV_MASK is defined as
 #define MPUTIM_PTV_MASK		(0x7<<PTV_BIT)

 while it should have been
 #define MPUTIM_PTV_MASK		(0x7<<MPUTIM_PTV_BIT)

- Below Patch corrects the same
Signed-off-by: NGururaja Hebbar <gururajakr@sanyo.co.in>

Signed-off-by: NAdrian Filipi <adrian.filipi@eurotech.com>

Signed-off-by: NGuennadi Liakhovetski <lg@denx.de>

The i.MX31 has three SPI buses and each bus has several chip selects
and the MC13783 chip can be connected to any of these. The current
RTC driver for MC13783 is hardcoded for CSPI2/SS2.

This patch makes make MC13783 SPI bus and chip select configurable
via CONFIG_MC13783_SPI_BUS and CONFIG_MC13783_SPI_CS.
Signed-off-by: NMagnus Lilja <lilja.magnus@gmail.com>

This patch adds the reset_timer() function (needed by nand_base.c) and
modifies the get_timer_masked() to work in the same way as the omap24xx
function.
Signed-off-by: NMagnus Lilja <lilja.magnus@gmail.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>