This is not used in U-Boot, and the only usage calls a non-existent
function. Drop it.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Rather than having an arch-specific function, use the existing generic
one.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This is only called from one place and the function cannot be inlined.
Convert it to a normal function.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This is not used in U-Boot. Drop this option and associated dead code.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This is not defined anywhere in U-Boot. Drop this dead code.
Signed-off-by: NSimon Glass <sjg@chromium.org>

To avoid an unnecessary arch-specific call in board_init_f(), rename this
function.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This converts the following to Kconfig:
   CONFIG_ARCH_MISC_INIT
Signed-off-by: NSimon Glass <sjg@chromium.org>

This converts the following to Kconfig:
   CONFIG_BOARD_EARLY_INIT_F
Signed-off-by: NSimon Glass <sjg@chromium.org>

This converts the following to Kconfig:
   CONFIG_ARCH_EARLY_INIT_R
Signed-off-by: NSimon Glass <sjg@chromium.org>

This is not defined by any board in U-Boot.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Commit ac337168 unified functions to flush and invalidate dcache by
range. These two functions were no-ops for SoCs other than 4xx and
MPC86xx. Adding these functions seemed to be correct but introduced
issues in some drivers when the dcache was flushed. While the root
cause was under investigation, these functions were disabled in
Commit cb1629f9 for affected SoCs, including the MPC85xx, to make
the various drivers work.

On the T208x USB stopped working after v2016.07 was pulled.  After
re-enabling the dcache functions for the MPC85xx it started working
again.  The USB and DPPA Ethernet drivers have been seen as
operational after this change but other drivers cannot be tested.
Reviewed-by: NChris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: NTony O'Brien <tony.obrien@alliedtelesis.co.nz>
Cc: Marek Vasut <marex@denx.de>
Cc: York Sun <york.sun@nxp.com>
Reviewed-by: York Sun <york.sun>

The read-only-write-enable bit is set by default and must be cleared
to prevent overwriting read-only registers.  This should be done
immediately after resetting the PCI Express controller.
Reviewed-by: NHamish Martin <hamish.martin@alliedtelesis.co.nz>
Signed-off-by: NTony O'Brien <tony.obrien@alliedtelesis.co.nz>
[York S: Move SYS_FSL_ERRATUM_A007815 to Kconfig]
Reviewed-by: NYork Sun <york.sun@nxp.com>

Core hang occurs when using L1 stashes. Workaround is to disable L1
stashes so software uses L2 cache for stashes instead.
Reviewed-by: NChris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: NDarwin Dingel <darwin.dingel@alliedtelesis.co.nz>
Cc: York Sun <york.sun@nxp.com>
[York S: Move SYS_FSL_ERRATUM_A007907 to Kconfig]
Reviewed-by: NYork Sun <york.sun@nxp.com>

As part of 1905c8fc we introduced failures depending on if swig and
libpython-dev are installed or not.  To provide coverage for this are of
code in the future ensure we have these packages installed.
Signed-off-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Currently all secure media types of SPL are generated for all platforms,
all platforms do not need all types, only generate the media types valid
for each platform.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Tested-by: NLokesh Vutla <lokeshvutla@ti.com>

When we have python building tools for the host it will not check HOSTXX
variables but only XX variables, for example LDFLAGS and not
HOSTLDFLAGS.

Cc: Simon Glass <sjg@chromium.org>
Reported-by: NHeiko Schocher <hs@denx.de>
Fixes: 1905c8fc ("build: Always build the libfdt python module")
Signed-off-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>
Tested-by: NHeiko Schocher <hs@denx.de>

In commit c2e7e72b, the ramdisk relocation code was moved from
image_setup_linux to do_bootm, leaving the bootz and booti cases broken.

This patch fixes both by adding the BOOTM_STATE_RAMDISK state in their
call to do_bootm_states if CONFIG_SYS_BOOT_RAMDISK_HIGH is set.
Signed-off-by: NCédric Schieli <cschieli@gmail.com>
Reviewed-by: NRick Altherr <raltherr@google.com>
Tested-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The module is continuously rebooting with the following message:
Net:   data abort
pc : [<fff77f42>]          lr : [<fff6e32b>]
reloc pc : [<80816f42>]    lr : [<8080d32b>]
sp : fdf5ce48  ip : fdf5d79c     fp : 00000017
r10: 8083cd58  r9 : fdf5cef0     r8 : fdf5d5d0
r7 : 48485000  r6 : 400000ff     r5 : fdf5d6e0  r4 : fdf5d618
r3 : fdf5d5b4  r2 : fdf5d5d0     r1 : 643a3631  r0 : fdf5d6e0
Flags: nzCv  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

Modifications:
* Enable Ethernet configuration in the SPL.
* Update PINMUX of PHY enable GPIO.
Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: NTom Rini <trini@konsulko.com>

This option should not really be user selectable.  Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.
Signed-off-by: NTom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)

Introduce board/freescale/common/Kconfig so that we have a single place
for CONFIG options that are shared between ARM and PowerPC NXP platforms.

Cc: York Sun <york.sun@nxp.com>
Signed-off-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Rename CONFIG_IMX31_PHYCORE_EET to CONFIG_TARGET_IMX31_PHYCORE_EET and
make this a distinct config target.
Signed-off-by: NTom Rini <trini@konsulko.com>

The directory structure of device tree files produced by the kernel's
'make dtbs_install' is different on ARM64, the RPi3 device tree file is
in a 'broadcom' subdirectory there.
Signed-off-by: NTuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>

Print the error code for non-zero (failure case) instead
of making debug statement without any condition, this
usually gives proper clue in failure condition.

Log:

The sdhci controller assumes that the base clock frequency is fully supported by
the peripheral and doesn't support hardware limitations. The Linux kernel
distinguishes between base clock (max_clk) of the host controller and maximum
frequency (f_max) of the card interface. Use the same differentiation and allow
the platform to constrain the peripheral interface.
Signed-off-by: NStefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>

  - Allow to disable SPL (mainly for ATF)
  - Refactor SoC init code
  - Update DRAM settings
  - Add PXs3 SoC support (DT, pinctrl driver, SoC code)

Initial support for PXs3 SoC.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Initial commit for the PXs3 SoC DT.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Add pin configuration and pinmux support for UniPhier PXs3 SoC.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

All the UniPhier DT files are compiled if CONFIG_ARCH_UNIPHIER
is enabled, but not all of them actually work.  For example, when
U-Boot is compiled for ARM 32 bit, 64 bit DT files are also built,
and vice versa.  Compile only the combination that makes sense.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

There are similar functions that look up SoC data by the SoC ID.
The new macro UNIPHIER_DEFINE_SOCDATA_FUNC will be helpful to
avoid the code duplication.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Currently, uniphier_get_soc_type() converts the SoC ID (this is
read from the revision register) to an enum symbol to use it for SoC
identification.  Come to think of it, there is no need for the
conversion in the first place.  Using the SoC ID from the register
as-is a straightforward way.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The <common.h> includes too many headers.  Actually, these files
needed to include it for udelay() declaration.  Now we can replace
it with <linux/delay.h> thanks to commit 5bc516ed ("delay:
collect {m, n, u}delay declarations to include/linux/delay.h").
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

These files only need error number macros.  Actually, IS_ERR(),
PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot.  Avoid
unnecessary header includes.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This defconfig does not support SPL.  If you use this, the basic
SoC initialization must be done in firmware that runs before U-Boot.
(Generally, ARM Trusted Firmware is expected to do this job).
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

We may want to run different firmware before running U-Boot.  For
example, ARM Trusted Firmware runs before U-Boot, making U-Boot
a non-secure world boot loader.  In this case, the SoC might be
initialized there, which enables us to skip SPL entirely.

This commit removes "select SPL" to make it configurable.  This
also enables the Multi SoC support for the UniPhier ARMv8 SoCs.
(CONFIG_ARCH_UNIPHIER_V8_MULTI)  Thanks to the driver model and
Device Tree, the U-Boot proper part is now written in a generic way.
The board/SoC parameters reside in DT.  The Multi SoC support
increases the memory footprint a bit, but the U-Boot proper does
not have strict memory constraint.  This will mitigate the per-SoC
(sometimes per-board) defconfig burden.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

These are file-internal and constant.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The ddrphy_shift_rof_hws() never writes back the shifted delay value
to the register, which makes this function non-effective.
Signed-off-by: NKotaro Hayashi <hayashi.kotaro@socionext.com>
[masahiro: add git log]
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Change bnk_typ's value from 8 to 0 (for G1's performance).
Signed-off-by: NWataru Okoshi <okoshi.wataru@socionext.com>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

On occasion the job that does these two build types will hit the time
limit so split this in two.
Signed-off-by: NTom Rini <trini@konsulko.com>