1. 25 11月, 2020 1 次提交
  2. 22 10月, 2020 1 次提交
  3. 09 9月, 2020 1 次提交
  4. 28 7月, 2020 2 次提交
  5. 07 7月, 2020 1 次提交
  6. 19 5月, 2020 4 次提交
  7. 14 5月, 2020 3 次提交
    • P
      arm: stm32mp: activate data cache in SPL and before relocation · 7e8471ca
      Patrick Delaunay 提交于
      Activate the data cache in SPL and in U-Boot before relocation.
      
      In arch_cpu_init(), the function early_enable_caches() sets the early
      TLB, early_tlb[] located .init section, and set cacheable:
      - for SPL, all the SYSRAM
      - for U-Boot, all the DDR
      
      After relocation, the function enable_caches() (called by board_r)
      reconfigures the MMU with new TLB location (reserved in
      board_f.c::reserve_mmu) and re-enable the data cache.
      
      This patch allows to reduce the execution time, particularly
      - for the device tree parsing in U-Boot pre-reloc stage
        (dm_extended_scan_fd =>dm_scan_fdt)
      - in I2C timing computation in SPL (stm32_i2c_choose_solution())
      
      For example, the result on STM32MP157C-DK2 board is:
         1,6s gain for trusted boot chain with TF-A
         2,2s gain for basic boot chain with SPL
      
      For information, as TLB is added in .data section, the binary size
      increased and the SPL load time by ROM code increased (30ms on DK2).
      
      But early malloc can't be used for TLB because arch_cpu_init()
      is executed before the early poll initialization done in spl_common_init()
      called by spl_early_init() So it too late for this use case.
      And if I initialize the MMU and the cache after this function it is
      too late, as dm_init_and_scan and fdt parsing is also called in
      spl_common_init().
      
      And .BSS can be used in board_init_f(): only stack and global can use
      before BSS init done in board_init_r().
      
      So .data is the better solution without hardcoded location but if you
      have size issue for SPL you can deactivate cache for SPL only
      (with CONFIG_SPL_SYS_DCACHE_OFF).
      Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
      Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
      7e8471ca
    • P
      stm32mp: add function get_cpu_dev · 7802a449
      Patrick Delaunay 提交于
      Add a function get_cpu_dev to get the DEV_ID present
      in DBGMCU_IDC register.
      Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
      Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
      7802a449
    • P
      board: stm32mp1: support boot from spi-nand · b664a745
      Patrick Delaunay 提交于
      Manage BOOT_FLASH_SPINAND, with boot_device="spi-nand"
      and treat this value in bootcmd_stm32mp.
      Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
      Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
      b664a745
  8. 15 4月, 2020 1 次提交
  9. 24 3月, 2020 3 次提交
    • P
      stm32mp1: add 800 MHz profile support · 050fed8a
      Patrick Delaunay 提交于
      The STM32MP1 series is available in 3 different lines which are pin-to-pin
      compatible:
      - STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz,
                    3D GPU, DSI display interface and CAN FD
      - STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz
                    and CAN FD
      - STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz
      
      Each line comes with a security option (cryptography & secure boot)
      & a Cortex-A frequency option :
      
      - A : Cortex-A7 @ 650 MHz
      - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
      - D : Cortex-A7 @ 800 MHz
      - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz
      
      This patch adds the support of STM32MP15xD and STM32MP15xF in U-Boot.
      Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
      Acked-by: NPatrice Chotard <patrice.chotard@st.com>
      050fed8a
    • P
      arm: stm32mp: add function get_soc_name · ac5e4d8a
      Patrick Delaunay 提交于
      Add a function get_soc_name to get a string with the full name
      of the SOC "STM32MP15xxx Rev.x"
      Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
      Acked-by: NPatrice Chotard <patrice.chotard@st.com>
      ac5e4d8a
    • P
      arm: stm32mp: bsec: add permanent lock support in bsec driver · 7ae22d72
      Patrick Delaunay 提交于
      Add BSEC lock access (read / write) at 0xC0000000 offset of misc driver.
      The write access only available for Trusted boot mode, based on new
      SMC STM32_SMC_WRLOCK_OTP.
      
      With the fuse command, the permanent lock status is accessed with
      0x10000000 offset (0xC0000000 - 0x8000000 for OTP sense/program
      divided by u32 size), for example:
      
      Read lock status of fuse 57 (0x39)
      
        STM32MP> fuse sense 0 0x10000039 1
      
        Sensing bank 0:
      
        Word 0x10000039: 00000000
      
      Set permanent lock of fuse 57 (0x39)
      
        STM32MP> fuse prog 0 0x10000039 1
      
        Sensing bank 0:
      
        Word 0x10000039: 00000000
      
      WARNING: the OTP lock is updated only after reboot
      
      WARING: Programming lock or fuses is an irreversible operation!
              This may brick your system.
      Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
      Acked-by: NPatrice Chotard <patrice.chotard@st.com>
      7ae22d72
  10. 14 2月, 2020 1 次提交
  11. 17 1月, 2020 1 次提交
  12. 08 1月, 2020 1 次提交
  13. 03 12月, 2019 1 次提交
  14. 12 8月, 2019 2 次提交
  15. 12 7月, 2019 2 次提交
  16. 06 6月, 2019 1 次提交
  17. 12 4月, 2019 7 次提交
  18. 21 11月, 2018 1 次提交
  19. 27 5月, 2018 2 次提交
  20. 07 5月, 2018 1 次提交
    • T
      SPDX: Convert all of our multiple license tags to Linux Kernel style · 4549e789
      Tom Rini 提交于
      When U-Boot started using SPDX tags we were among the early adopters and
      there weren't a lot of other examples to borrow from.  So we picked the
      area of the file that usually had a full license text and replaced it
      with an appropriate SPDX-License-Identifier: entry.  Since then, the
      Linux Kernel has adopted SPDX tags and they place it as the very first
      line in a file (except where shebangs are used, then it's second line)
      and with slightly different comment styles than us.
      
      In part due to community overlap, in part due to better tag visibility
      and in part for other minor reasons, switch over to that style.
      
      This commit changes all instances where we have multiple licenses (in
      these cases, dual license) declared in the SPDX-License-Identifier tag.
      In this case we change from listing "LICENSE-A LICENSE-B" or "LICENSE-A
      or LICENSE-B" or "(LICENSE-A OR LICENSE-B)" to "LICENSE-A OR LICENSE-B"
      as per the Linux Kernel style document.  Note that parenthesis are
      allowed so when they were used before we continue to use them.
      Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
      Signed-off-by: NTom Rini <trini@konsulko.com>
      4549e789
  21. 07 4月, 2018 3 次提交