Add i.IMXRT family basic support.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add compatible "fsl,imxrt-usdhc" to make mmc working on i.MXRT platforms
with CONFIG_DM_MMC=y.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Not all architectures(i.e. i.MXRT) support mxc_get_clock() and use DM_CLK
instead. So building could result in failure due to missing
mxc_get_clock().

Make if(CONFIG_IS_ENABLED(CLK)) an #if statement.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add SDRAM driver for i.MXRT SoCs.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add i.MXRT compatible string and cpu type support to lpuart driver,
to use little endian 32 bits configurations.

Also according to RM, the Receive RX FIFO Enable (RXFE) field in LPUART
FIFO register is bit 3, so this definition should change to 0x08 as done
for i.MX8. It needs also to set baudrate the same way as i.MX8 does.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

This driver assumes that lpuart clock is already enabled before probing
but using DM only lpuart won't be automatically enabled so add
clk_enable() when probing if CONFIG_CLK is defined. If clock is not
found, because DM is not used, let's emit a warning and proceed, because
serial clock could also be already enabled by non DM code. If clock is
found but cna't be enabled then return with error.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add dtsi file for i.MXRT1050.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add i.MXRT1050 support, there are 5 GPIO banks.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add i.MXRT pinctrl driver.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add i.MXRT1050 clk driver support.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Implement set_rate() for pfd.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: NLukasz Majewski <lukma@denx.de>

Add support for PLLV3 AV type.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add PLLV3_SYS support by adding set/get_rate() for PLLV3_SYS but keeping
generic enable()/disable(). Add a different driver because ops are
different respect to GENERIC/USB.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: NLukasz Majewski <lukma@denx.de>

Add generic set_rate() support.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: NLukasz Majewski <lukma@denx.de>

Add disable() support.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: NLukasz Majewski <lukma@denx.de>

Before set_rate() pllv3 needs enable() to power the pll up.
Add enable() taking into account different power_bit and
different powerup_set, because some pll needs its power_bit to be
set or reset to be powered on.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

div_mask is different for GENERIC and USB pll, so set it according.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: NLukasz Majewski <lukma@denx.de>

Better to register the 2 clock as 2 different drivers because they work
slightly differently depending on power_bit and powerup_set bits coming
on next patches.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: NLukasz Majewski <lukma@denx.de>

Since some driver requires this function add it as an empty stub
when DCACHE is OFF.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

At the moment entry_point is set to image_get_load(header) that sets it
to "load address" instead of "entry point", assuming entry_point is
equal to load_addr, but it's not true. Then load_addr is set to
"entry_point - header_size", but this is wrong too since load_addr is
not an entry point.

So use image_get_ep() for entry_point assignment and image_get_load()
for load_addr assignment.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

IPG clock description is missing for I2C0 and I2C2 busses,
add it. Otherwise we see -ENODATA error when trying to get
I2C clock for these busses.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Since commit d02be21d ("i2c: imx_lpi2c: add ipg clk") getting
I2C clocks doesn't work. Add I2C IPG clock IDs to related switch
statements to fix it.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: Lukasz Majewski <lukma@denx.de>
Reviewed-by: NPeng Fan <peng.fan@nxp.com>

imx6ul-14x14-evk does not have a GPIO dedicated for reading the card
detect pin on the eSDHC2 port. In such cases the "broken-cd" property
must be passed, otherwise the card cannot be detected.
Signed-off-by: NFabio Estevam <festevam@gmail.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>

When no GPIO is used to read the card detect status the following
error is seen:

MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... MMC: no card present
*** Warning - No block device, using default environment

Fix it by handling the "broken-cd" property in the same way
that drivers/mmc/sdhci.c does, which considers that the SD card
is present when the "broken-cd" property is passed.

Tested on a imx6ul-evk board.
Signed-off-by: NFabio Estevam <festevam@gmail.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Signed-off-by: NJoris Offouga <offougajoris@gmail.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>

For DM_ETH support , it's require to disable this config.
When this config is enable, This generate a error with spl in linker script
Signed-off-by: NJoris Offouga <offougajoris@gmail.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Currently the following SPL hang is observed:

U-Boot SPL 2020.01-rc5-00079-g797eee36 (Jan 06 2020 - 11:24:09 -0300)
Trying to boot from MMC1
Card did not respond to voltage select!
spl: mmc init failed with error: -95
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

Fix it by moving the eSDHC2 initialization to SPL.

While at it, since this board uses DM_MMC all the esdhc board
code can be removed to make the code simpler.
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Update README to use 4.19.35_1.1.0 released firmware images.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Only the wandboard revD1 boards have PMIC, so when running on a wandboard
of different revision the following error is always shown on every boot:

pmic_get() ret -19

Instead of printing this error message, move it to debug level instead.
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Some i.MX8QXP MEK boards do not have MAC address stored
and hang during eth driver probe:

Error: ethernet@5b040000 address not set.

(Board hangs)

To fix this problem select CONFIG_NET_RANDOM_ETHADDR so that
a valid MAC address can be used in such case.
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Add support for Capricorn Deneb SoM variant.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

Add support for i.MX8X based Capricorn Giedi SoM.

Supported interfaces: GPIO, ENET, eMMC, I2C, UART.

Console output:

  U-Boot SPL 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100)
  Trying to boot from MMC1
  Load image from MMC/SD 0x3e400

  U-Boot 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100) ##v01.07

  CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz at 30C

  Model: Siemens Giedi
  Board: Capricorn
  Boot:  MMC0
  DRAM:  1022 MiB
  MMC:   FSL_SDHC: 0
  Loading Environment from MMC... OK
  In:    serial@5a080000
  Out:   serial@5a080000
  Err:   serial@5a080000
  Net:   eth1: ethernet@5b050000 [PRIME]
  Autobooting in 1 seconds, press "<Esc><Esc>" to stop
Signed-off-by: NAnatolij Gustschin <agust@denx.de>

Given our tests in GitLab / Azure we can use QEMU v4.2.0 for all
platforms now.
Signed-off-by: NTom Rini <trini@konsulko.com>

- Updated base snapshot
- QEMU v4.2.0
Signed-off-by: NTom Rini <trini@konsulko.com>

- Android image support enhancements
- Assorted ARM fixes and enhancements
- m68k update

Trying to extend 'adtimg' functionality [1], we've been severely hit
by a major limitation in the command's usage scheme. Specifically, the
command's user interface appears to be too centric to getting the
DTB/DTBO entry [3] based on the index of the desired DT in the image,
which makes it really difficult retrieving the DT entry based on
alternative criteria (e.g. filtering by id/rev fields), the
latter being demanded by real life customer use-cases [1].

This went to the point of receiving below feedback from Sam [2]:

 -- snip --
 As for 'dtimg' command: after giving it some thought, I think not much
 people using it yet. So in this particular case I don't have some
 strong preference, and if you think the 'dtimg' interface is ugly, and
 it overcomes "don't break interfaces" rule, maybe now is a good time
 to rework it (before it gets widely used).
 -- snip --

Given the above, rework the usage pattern from [4] to [5], in order to
allow an intuitive enablement of "by id|rev" DT search [6].

[1] https://patchwork.ozlabs.org/cover/1202575/
    ("cmd: dtimg: Enhance with --id and --rev options (take #1)")
[2] https://patchwork.ozlabs.org/patch/1182207/#2317020
[3] https://source.android.com/devices/architecture/dto/partitions
[4] Old usage
adtimg dump <addr>                    - Print image contents
adtimg start <addr> <index> <varname> - Get DT address by index
adtimg size <addr> <index> <varname>  - Get DT size by index

[5] New usage
adtimg addr <addr>                      - Set image location to <addr>
adtimg dump                             - Print out image contents
adtimg get dt --index=<i> [avar [svar]] - Get DT address and size by index

[6] Soon-to-be-provided "by id|rev" add-on functionality
adtimg get dt --id=<id> --rev=<rev> [avar [svar [ivar]]]
 - Get DT address/size/index by id|rev fields
Signed-off-by: NEugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: NSam Protsenko <semen.protsenko@linaro.org>

With 'dtimg.c' renamed to 'adtimg.c', now ensure the naming
consistency in the internal implementation of 'adtimg.c'.

No functional change intended.
Signed-off-by: NEugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: NSam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Rename the existing 'dtimg' command to 'adtimg', in order to:
 - Suggest the Android origins and scope
 - Be consistent with the upcoming 'abootimg' command (naming
   suggested by Simon [*])

The change in _not_ backward compatible, but its benefits outweigh its
downsides, given that we don't expect active users of 'dtimg' today.

Perform the rename in several steps:
 1. Rename *.c file and Kconfig symbol. This should allow
    'git log --follow' to properly track the history of 'adtimg.c'
 2. 's/dtimg/adtimg/g' in the internal namespace of 'adtimg.c'

ELF comparison [**] before and after shows no functional change.

[*] https://patchwork.ozlabs.org/patch/1182212/#2291600
[**] diff -u <(objdump -d cmd/dtimg.o) <(objdump -d cmd/adtimg.o)

Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: NEugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass<sjg@chromium.org>
Reviewed-by: NSam Protsenko <semen.protsenko@linaro.org>

%s/devicd/device
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Current U-Boot has only support for psci reset.
Adding support for arm psci reset2 allows passing of reset level
and other platform sepcific parameters like strap settings
to lowlevel psci implementation.
Signed-off-by: NRajesh Ravi <rajesh.ravi@broadcom.com>
Signed-off-by: NVladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>