- 05 10月, 2012 1 次提交
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由 Dinh Nguyen 提交于
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Signed-off-by: NChin Liang See <clsee@altera.com> Signed-off-by: NPavel Machek <pavel@denx.de> Reviewed-by: NMarek Vasut <marex@denx.de> Acked-by: NTom Trini <trini@ti.com> Cc: Wolfgang Denx <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> ---- v8: Remove no_return attribute for reset_cpu Based on v2012.10-rc2
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- 04 10月, 2012 2 次提交
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由 Michal Simek 提交于
Add support for Xilinx Zynq board. Signed-off-by: NMichal Simek <monstr@monstr.eu> Acked-by: NMarek Vasut <marex@denx.de> CC: Joe Hershberger <joe.hershberger@gmail.com>
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由 Stefan Roese 提交于
This patch adds support for the X600 SPEAr600 based board. Its also the first SPEAr600 board that uses the newly introduced SPEAr600 SPL support. Xloader is not necessary any more. By using the new "u-boot.spr" make target, one image will generated containing both, U-Boot SPL (with mkimage header as needed by the SPEAr BootROM, and the main U-Boot with mkimage header. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Amit Virdi <amit.virdi@st.com> Cc: Vipin Kumar <vipin.kumar@st.com>
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- 03 10月, 2012 6 次提交
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由 Luka Perkov 提交于
Add support for new board iConnect from Iomega. More information about the device can be found here: http://go.iomega.com/en/products/network-storage-desktop/wireless-data-station/network-hard-drive-iconnect/?partner=4735Signed-off-by: NLuka Perkov <uboot@lukaperkov.net> Tested-by: NWojciech Dubowik <wojciech.dubowik@neratec.com> Tested-by: NTim Fletcher <tim@night-shade.org.uk>
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由 Simon Guinot 提交于
This patch adds support for the LaCie board d2 Network v2 which share a lot of hardware caracteristics with the 2Big Network v2. - CPU: Marvell 88F6281 1200Mhz - SDRAM memory: 256MB DDR2 400Mhz - 2 SATA ports: internal and eSATA - Gigabit ethernet: PHY Marvell 88E1116R - Flash memory: SPI NOR 512KB (Macronix MX25L4005A) - i2c EEPROM: 512 bytes (24C04 type) - 2 USB2 ports: host and host/device - 1 push button - 1 power switch - 1 SATA LED (bi-color, blue and red) Signed-off-by: NSimon Guinot <simon.guinot@sequanux.org>
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由 Simon Guinot 提交于
This patch adds support for the LaCie boards Network Space v2 (Lite and Mini). This two boards are derived from the Network Space v2 and a lot of hardware caracteristics are shared. - CPU: Marvell 88F6192 800Mhz - SDRAM memory: 128MB DDR2 200Mhz - 1 SATA port: internal - Gigabit ethernet: PHY Marvell 88E1318 - Flash memory: SPI NOR 512KB (Macronix MX25L4005A) - i2c EEPROM: 512 bytes (24C04 type) - 2 USB2 ports (Lite only): host and host/device - 1 push button - 1 SATA LED (bi-color, blue and red) Signed-off-by: NSimon Guinot <simon.guinot@sequanux.org>
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由 Gabriel Huau 提交于
Support of the MINI2440 board from FriendlyARM from an old version of u-boot : http://repo.or.cz/r/u-boot-openmoko/mini2440.git Currently, supporting only boot from NOR. Signed-off-by: NGabriel Huau <contact@huau-gabriel.fr>
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由 Hideyuki Sano 提交于
The Armadillo-800EVA board has Renesas R-Mobile R8A7740, 512MB DDR3-SDRAM, Ethernet, and more. This patch supports the following functions: - 512MB DDR3-SDRAM - Serial console (SCIF) - Ethernet MAC(MII) & PHY(SMSC) Signed-off-by: NHideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Nobuhiro Iwamatsu 提交于
The KZM-A9-GT board has Renesas R-Mobile SH73A0, 512MB DDR2-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - 512MB DDR2-SDRAM - 16MB NOR Flash memory - Serial console (SCIF) - Ethernet (SMSC) - I2C Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>
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- 19 9月, 2012 1 次提交
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由 Marek Vasut 提交于
This board is the only board that still sticks to OneNAND IPL. Remove this board, since we have SPL around for a while and OneNAND is well supported in the SPL framework. The board can be revived if necessary. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Tom Rini <trini@ti.com>
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- 13 9月, 2012 1 次提交
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由 Andreas Bießmann 提交于
This patch is derived from an older patch provided by atmel in its buildroot-avr32-v3.0.0.tar.bz2 Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com> cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: NHans-Christian Egtvedt <egtvedt@samfundet.no>
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- 05 9月, 2012 1 次提交
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由 Jens Scharsig 提交于
* add ram target for EB+CPUx9k2 board (eb_cpux9k2_ram_config) Signed-off-by: NJens Scharsig <js_at_ng@scharsoft.de> Signed-off-by: NJens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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- 01 9月, 2012 16 次提交
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由 Bo Shen 提交于
Add at91sam9x5 series spi flash boot support Using at91sam9x5ek_spiflash to configure, then it can boot from at25df321 serial flash SPI mater work in 30Mhz speed, while not 1Mhz speed. This will base on atmel_spi patch, or else, it will occur receive overrun Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Matt Sealey 提交于
* Move Efika MX Smarttop and Smartbook boards into a "genesi" vendor directory * Rename efikamx -> mx51_efikamx since there is an mx53_efikamx and mx6_efikamx to come Signed-off-by: NMatt Sealey <matt@genesi-usa.com> Acked-by: NStefano Babic <sbabic@denx.de> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Allen Martin 提交于
Add SPL options to tegra20 config files and enable SPL build for tegra20 boards. Also remove redundant code from u-boot that is not contained in SPL. Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
The Raspberry Pi model B uses the BCM2835 SoC, has 256MB of RAM, contains an SMSC 9512 USB LAN/Hub chip, and various IO connectors. For more details, see http://www.raspberrypi.org/. Various portions (cache enable, MACH_TYPE setup, RAM size limit, stack relocation to top of RAM) extracted from work by: Oleksandr Tymoshenko <gonzo@bluezbox.com>. GPIO driver enablement by Vikram Narayanan <vikram186@gmail.com>. Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Acked-by: NTom Rini <trini@ti.com>
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由 Mathieu J. Poirier 提交于
Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: NJohn Rigby <john.rigby@linaro.org> Acked-by: NTom Rini <trini@ti.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Conflicts: drivers/gpio/Makefile
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由 Otavio Salvador 提交于
Fix build failure due the move of mx28 code to 'mxs' SoC. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Marek Vasut 提交于
This i.MX28 platform supports the following: * 2x FEC ethernet * USB on USBH0 * I2C EEPROM * SPI NVRAM * LEDs Signed-off-by: NMarek Vasut <marex@denx.de>
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由 Otavio Salvador 提交于
Most code can be shared between i.MX23 and i.MX28 as both are from i.MXS family; this source directory structure makes easy to share code among them. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Veli-Pekka Peltola 提交于
This adds support for Bluegiga APX4 Development Kit. It is built around Freescale i.MX28. Currently supported features are: ethernet, I2C, MMC, RTC and USB. APX4 has only one ethernet port. Signed-off-by: NVeli-Pekka Peltola <veli-pekka.peltola@bluegiga.com> Signed-off-by: NLauri Hintsala <lauri.hintsala@bluegiga.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Markus Hubig 提交于
This adds support for the AT91SAM9G20 boards by taskit GmbH. Both boards, Stamp9G20 and PortuxG20, are integrated in one file. PortuxG20 is basically a SBC built around the Stamp9G20. Signed-off-by: NMarkus Hubig <mhubig@imko.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: NAndreas Bießmann <andreas.deve@googlemail.com>
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由 Bo Shen 提交于
Add at91sam9x5ek board support, this board support the following SoCs AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35 Using at91sam9x5ek_nandflash to configure for the board Now only supports NAND with software ECC boot up Signed-off-by: NBo Shen <voice.shen@atmel.com> [move MAINTAINERS entry to right place] Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Javier Martinez Canillas 提交于
IGEP-based boards can have two different flash memories, a OneNAND or a NAND device. Add a configuration option for to choose which memory to use. Signed-off-by: NJavier Martinez Canillas <javier@dowhile0.org> Acked-by: NEnric Balletbo i Serra <eballetbo@gmail.com>
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由 Lad, Prabhakar 提交于
This patch adds support for direct NOR boot mode on da850/omap-l138. Added da850evm_direct_nor entry in boards.cfg to allow to build targets. Tested-by: NChristian Riesch <christian.riesch@omicron.at> Signed-off-by: NLad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: NRajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: NHadli, Manjunath <manjunath.hadli@ti.com>
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由 Anatolij Gustschin 提交于
Remove old o2dnt board without OF support. New support for this board is added by the previous patch, O2I configuration. Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Anatolij Gustschin 提交于
Add common code for o2dnt and o2dnt2 based boards and add different board configuration files for O2D, O2I, O2DNT2, O2D300, O2MNT and O3DNT boards. Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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- 24 8月, 2012 2 次提交
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由 Daniel Schwierzeck 提交于
Tested with 'qemu-system-mipsel -machine mips -bios u-boot.bin -nographic' Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Timur Tabi 提交于
The P3060 was cancelled before it went into production, so there's no point in supporting it. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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- 23 8月, 2012 2 次提交
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由 Liu Gang 提交于
When boot from PCIE, slave's core should be in holdoff after powered on for some specific requirements. Master will release the slave's core at the right time by PCIE interface. Slave's ucode and ENV can be stored in master's memory space, then slave can fetch them through PCIE interface. For the corenet platform, ucode is for Fman. NOTE: Because the slave can not erase, write master's NOR flash by PCIE interface, so it can not modify the ENV parameters stored in master's NOR flash using "saveenv" or other commands. environment and requirement: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image is in master NOR flash. 3. Put the slave's ucode and ENV into it's own memory space. 4. Normally boot from local NOR flash. 5. Configure PCIE system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to one PCIE interface by RCW. 3. RCW should configure the SerDes, PCIE interfaces correctly. 4. Must set all the cores in holdoff by RCW. 5. Must be powered on before master's boot. For the slave module, need to finish these processes: 1. Set the boot location to one PCIE interface by RCW. 2. Set a specific TLB entry for the boot process. 3. Set a LAW entry with the TargetID of one PCIE for the boot. 4. Set a specific TLB entry in order to fetch ucode and ENV from master. 5. Set a LAW entry with the TargetID one of the PCIE ports for ucode and ENV. 6. Slave's u-boot image should be generated specifically by make xxxx_SRIO_PCIE_BOOT_config. This will set SYS_TEXT_BASE=0xFFF80000 and other configurations. In addition, the processes are very similar between boot from SRIO and boot from PCIE. Some configurations like the address spaces can be set to the same. So the module of boot from PCIE was added based on the existing module of boot from SRIO, and the following changes were needed: 1. Updated the README.srio-boot-corenet to add descriptions about boot from PCIE, and change the name to README.srio-pcie-boot-corenet. 2. Changed the compile config "xxxx_SRIOBOOT_SLAVE" to "xxxx_SRIO_PCIE_BOOT", and the image builded with "xxxx_SRIO_PCIE_BOOT" can support both the boot from SRIO and from PCIE. 3. Updated other macros and documents if needed to add information about boot from PCIE. Signed-off-by: NLiu Gang <Gang.Liu@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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由 Liu Gang 提交于
Get rid of the SRIOBOOT_MASTER build target, and to support for serving as a SRIO boot master via environment variable. Set the environment variable "bootmaster" to "SRIO1" or "SRIO2" using the following command: setenv bootmaster SRIO1 saveenv The "bootmaster" will enable the function of the SRIO boot master, and this has the following advantages compared with SRIOBOOT_MASTER build configuration: 1. Reduce a build configuration item in boards.cfg file. No longer need to build a special image for master, just use a normal target image and set the "bootmaster" variable. 2. No longer need to rebuild an image when change the SRIO port for boot from SRIO, just set the corresponding value to "bootmaster" based on the using SRIO port. Signed-off-by: NLiu Gang <Gang.Liu@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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- 10 8月, 2012 2 次提交
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由 Jens Scharsig 提交于
* rename board directory to eb_cpu5282 * rename EB+MCF-EV123_.*config to eb_cpu5282_.*config * add Maintainer for EB+CPU5282 board * rename prompt Signed-off-by: NJens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
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由 Allen Martin 提交于
Add support for specifying a differnt CPU for main u-boot and SPL u-boot builds. This is done by adding an optional SPL CPU after the main CPU in boards.cfg as follows: normal_cpu:spl_cpu This this case CPU will be set to "normal_cpu" during the main u-boot build and "spl_cpu" during the SPL build. Signed-off-by: NAllen Martin <amartin@nvidia.com>
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- 09 8月, 2012 1 次提交
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由 Matthew McClintock 提交于
Add TLB mappings, board target options, and configuration items need for SPI/SD boot. Since P1022DS RevB board, the NOR flash have been changed to 16 bit/28bit address flash, therefore, when SDHC/ESPI booting and access to eLBC, the PMUXCR[0~1] must be set to 10b, and PMUXCR[9~10] must be set to 00b for them. Configure the PX_BRDCFG0[0~1] to 10b which is connected to SPI devices as SPI_CS(0:3)_B. Signed-off-by: NMatthew McClintock <msm@freescale.com> Signed-off-by: NJerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: NJiang Yutang <b14898@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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- 01 8月, 2012 1 次提交
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由 Gerlando Falauto 提交于
Since mgcoge and mgcoge3ne are the only km82xx boards, there is no need to keep them as separate .h config files. Therefore, make mgcoge3ne.h and mgcoge.h converge into a single km82xx.h file. Signed-off-by: NGerlando Falauto <gerlando.falauto@keymile.com>
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- 10 7月, 2012 1 次提交
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由 Thierry Reding 提交于
The Tamonten Evaluation Carrier is an evaluation board for the Tamonten processor board. More information is available here: http://www.avionic-design.de/en/products/nvidia-tegra-tamonten-system-en/nvidia-tegra-tamonten-evboard-en.htmlSigned-off-by: NThierry Reding <thierry.reding@avionic-design.de> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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- 07 7月, 2012 3 次提交
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由 esw@bus-elektronik.de 提交于
* add support for board VL+MA2SC * adds vl_ma2sc_config for standard NOR boot configuration * adds vl_ma2sc_ram_config for RAM load configuration Signed-off-by: NJens Scharsig <esw@bus-elektronik.de>
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由 Vipin KUMAR 提交于
This patch adds options for all the below mentioned configurations and subsequently renames the include/configs/spearxxx.h files to spear3xx_evb.h, spear6xx_evb.h etc to depict evaluation board configuration. SPEAr3xx and SPEAr6xx boards can be compiled in following configurations 1. Environment placed in NAND 2. Console on usb device 3. Console on usb device with environment placed in NAND 4. SPEAr310 and SPEAr320 support environment variables in parallel NOR flash. Signed-off-by: NVipin Kumar <vipin.kumar@st.com> Signed-off-by: NAmit Virdi <amit.virdi@st.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Holger Brunck 提交于
Remove config options from boards.cfg and simply add one switch per board and differ afterwards in km_kirkwood.h between the features. More boards are upcoming and therefore it's easier to have this at one place. Signed-off-by: NHolger Brunck <holger.brunck@keymile.com> Signed-off-by: NValentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
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