This code does not really need to use #ifdef. We can use if() instead and
gain build coverage without impacting code size.

Change the #ifdefs to use CONFIG_IS_ENABLED() instead.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This code does not really need to use #ifdef. We can use if() instead and
gain build coverage without impacting code size.

Change the #ifdefs to use IS_ENABLED() instead.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This code does not really need to use #ifdef. We can use if() instead and
gain build coverage without impacting code size.

Change the #ifdefs to use IS_ENABLED() instead.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Most x86 boards that use video make use of 32bpp graphics. Enable this by
default. This fixes missing graphics output on some x86 boards.

Also remove the unnecessary 'default n' while we are here.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Fixes for 2020.01
-----------------
- Fixes for Nitrogen6x
- Fix corruption for mx51evk
- colibri i.MX6: fix broken ESDHC conversion
- mx6sxsabresd: fix broken mmcdev
- imx6q_logic: cleanup boot sequence
- update ATF for imx8mq_evk
- pfuze: fix pmic_get()

Travis CI: https://travis-ci.org/sbabic/u-boot-imx/builds/630007464

- Orange Pi Zero Plus 2 support
- sunxi psci, prcm fixes

- rk spi transfer limit fix
- Gigadevice, gd25q128 support
- spi-nor-core warnings

The omap3_beagle NAND ECC scheme was changed in 4b37928d for unknown
reasons, leading to uncorrectible ecc errors. This commit changes it
back to what it was before.
Signed-off-by: NPatrik Dahlström <risca@dalakolonin.se>

Add compatible string used by Linux.
Allows for simpler syncing of device trees.
Signed-off-by: NRobert Beckett <bob.beckett@collabora.com>

Add compatible strings used by Linux.
Allows for simpler syncing of device trees.
Signed-off-by: NRobert Beckett <bob.beckett@collabora.com>

pass the udevice by reference instead of double ref
Signed-off-by: NRobert Beckett <bob.beckett@collabora.com>

The board_boot_order() function currenly assumes that the boot source
is MMC/eMMC, but this isn't true for the NAND devices.

This patch cleans up board_boot_order() to check for NAND, SD, ESD,
MMC or EMMC.  Anything beyond these are not supported, so it will
default back to the serial downloader if any of those devices are not
available.

Fixes: 9fb50c68 ("ARM: imx6q_logic: Fix MMC2 booting")
Signed-off-by: NAdam Ford <aford173@gmail.com>

This fixes commit <91435cd4> "ARM: i.MX6: exclude the ARM errata
 from i.MX6 UP system"

for nitrogen6x. The above commit removed the errata for the board
since MX6Q/MXDL/MX6S is selected via CONFIG_SYS_EXTRA_OPTIONS

This restores the errata configs.
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: NFabio Estevam <festevam@gmail.com>

The next patch adds CONFIG_MX6QDL so that
errata will be enabled again.
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>

The Rockchip SPI controller's length register only supports 16-bits,
yielding a maximum length of 64KiB (the CTRLR1 register holds "length -
1"). Trying to transfer more than that (e.g., with a large SPI flash
read) will cause the driver to hang.

Now, it seems that while theoretically we should be able to program
CTRLR1 with 0xffff, and get a 64KiB transfer, but that also seems to
cause the core to choke, so stick with a maximum of 64K - 1 bytes --
i.e., 0xffff.

Note, that the size is further divided into 'minus 1' while writing
into CTRLR1.

This change fixed two different read issues,

1. sf read failure when with > 0x10000

2. Boot from SPI flash failed during spi_flash_read call in
   common/spl/spl_spi.c

Observed and Tested in
- Rockpro64 with Gigadevice flash
- ROC-RK3399-PC with Winbond flash
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Static checker warns 'ret' variable may be used uninitialized in
spi_nor_erase() and spi_nor_write() in case of zero length requests.
Fix these warnings by checking for zero length requests and returning
early.
Reported-by: NDan Murphy <dmurphy@ti.com>
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

IMX based platforms can have the DCD table located on different
addresses due to differences in their memory maps (ie iMX7ULP).

This information is required by the user to sign the images for secure
boot so continue making it accessible via mkimage.
Signed-off-by: NJorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: NFabio Estevam <festevam@gmail.com>
Signed-off-by: NStefano Babic <sbabic@denx.de>

Following the README instructions leads to a non-booting
U-Boot:

U-Boot SPL 2020.01-rc3-00070-g9a0cbae2 (Nov 25 2019 - 13:08:24 -0300)
PMIC:  PFUZE100 ID=0x10
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Trying to boot from MMC2

(It hangs here)

Use the "imx_4.19.35_1.0.0" ATF branch instead, which
fixes such problem and allow the boot to complete again.
Suggested-by: NAdam Ford <aford173@gmail.com>
Signed-off-by: NFabio Estevam <festevam@gmail.com>
Acked-by: NPeng Fan <peng.fan@nxp.com>

Passing earlycon string in the command line may be
useful during bring up, but not after such phase.

Remove the earlycon string to align with the other i.MX SoCs
command lines.
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Currently inside ddr_init() there is a mix of printf() and debug()
level messages.

Since this type of information is useful for debug purposes,
convert all of them to debug level for consistency.
Signed-off-by: NFabio Estevam <festevam@gmail.com>
Reviewed-by: NPeng Fan <peng.fan@nxp.com>

U-Boot binary has grown in such a way that it goes beyond the reserved
area for the environment variables.

Running "saveenv" followed by a "reset" causes U-Boot to hang because
of this overlap.

Fix this problem by increasing the CONFIG_ENV_OFFSET size.

Also, in order to prevent this same problem to happen in the future,
use CONFIG_BOARD_SIZE_LIMIT, which will detect the overlap in build-time.

CONFIG_BOARD_SIZE_LIMIT does not accept math expressions, so declare
CONFIG_ENV_OFFSET with its direct value instead.
Signed-off-by: NFabio Estevam <festevam@gmail.com>

After the DM conversion the boot SD card is now device 3.

Adjust it so that we can boot the kernel again.

While at it avoid a hardcoded mmc dev inside the finduuid script.
Signed-off-by: NFabio Estevam <festevam@gmail.com>

Currently the following hang is observed when booting a imx6sx-sdb
board:

U-Boot 2020.01-rc5-00004-g643366bc (Dec 19 2019 - 14:56:23 -0300)

CPU:   Freescale i.MX6SX rev1.0 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 32C
Reset cause: POR
Model: Freescale i.MX6 SoloX SDB RevB Board
Board: MX6SX SABRE SDB revA
DRAM:  1 GiB
initcall sequence bffd8514 failed at call 87804cc0 (err=-19)
### ERROR ### Please RESET the board ###

When pmic_get() is used with DM the first parameter must be
the complete node name plus the unit address.

Fix the pmic_get() parameter to fix the boot regression.

Tested on a imx6sx-sdb and imx6q-sabresd boards.
Signed-off-by: NFabio Estevam <festevam@gmail.com>
Reviewed-by: NIgor Opaniuk <igor.opaniuk@toradex.com>

Not all CONFIG_FSL_ESDHC defines were properly replaced with
CONFIG_FSL_ESDHC_IMX, which broke U-boot proper booting on
Colibri iMX6 SoMs.

U-boot is stuck after this message:
Commercial temperature grade DDR3 timings, 64bit bus width.
Trying to boot from MMC1

Fixes: e37ac717("Convert to use fsl_esdhc_imx for i.MX platforms")
Signed-off-by: NIgor Opaniuk <igor.opaniuk@toradex.com>

- Update maintainer on omapl138_lcdk
- Match TRM sequence & settings in the TI pipe3 PHY

As per the email discussion[0], add myself as a maintainer to
OMAPL138_LCDK and drop Peter's entry.

[0] http://u-boot.10912.n7.nabble.com/OMAP-L138-LCDK-giving-up-maintainership-td394211.htmlSigned-off-by: NLokesh Vutla <lokeshvutla@ti.com>

As per "Table 26-7. SATA PHY Subsystem Low-Level Programming Sequence"
in TRM [1] we need to turn on SATA_PHY_TX before SATA_PHY_RX.

[1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdfSigned-off-by: NRoger Quadros <rogerq@ti.com>

For increased DPLL stability use the settings recommended in
the TRM [1] for PHY_RX registers for SATA and USB.

For SATA we need to use spread spectrum settings even
though we don't have spread spectrum enabled. The
suggested non-spread spectrum settings don't work.

[1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdfSigned-off-by: NRoger Quadros <rogerq@ti.com>

Introduce a mode property in the driver data so that
we don't have to keep using "of_device_is_compatible()"
throughtout the driver.

No functional change.
Signed-off-by: NRoger Quadros <rogerq@ti.com>

The AM572x Technical Reference Manual, SPRUHZ6H,
Revised November 2016 [1], shows recommended settings for the
SATA DPLL in Table 26-8. DPLL CLKDCOLDO Recommended Settings.

Use those settings in the driver. The TRM does not show
a value for 20MHz SYS_CLK so we use something close to the
26MHz setting.

[1] - http://www.ti.com/lit/ug/spruhz6h/spruhz6h.pdfSigned-off-by: NRoger Quadros <rogerq@ti.com>

- dwc3 and cdns3 bug fixes

- Fix phy_connect() call in two drivers
- fw_setenv bugfix

DWC3 support phy interfaces like 8/16-bit UTMI+. phy interface
initialization code would handle them properly along with UNKNOWN
type by default if none of the user/board doesn't need to use the
phy interfaces at all.

The current code is masking the 8/16-bit UTMI+ interface bits globally
which indeed effect the UNKNOWN cases, therefore it effects the platforms
which are not using phy interfaces at all.

So, handle the phy masking bits accordingly on respective interface
type cases.

Fixes: 6b7ebff0 ("usb: dwc3: Add phy interface for dwc3_uboot")
Reported-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Marek is already maintaining USB. Assign files common/usb.c and
common/usb_kbd.c to him.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

Since, commit 62f9b654 ("common: Move older CPU functions to their own header")
cache ops functions are declared in a separate header. Include the same
to avoid build warnings.
Signed-off-by: NVignesh Raghavendra <vigneshr@ti.com>

In the case where one deletes an already-non-existing variable, or sets
a variable to the value it already has, there is no point in writing the
environment back, thus reducing wear on the underlying storage
device.

In the case of redundant environments, if the two environments
differ (e.g. because one is corrupt), make sure that any call of
fw_setenv causes the two to become synchronized, even if the fw_setenv
call does not change anything in the good copy.
Signed-off-by: NRasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Passing 0 to PHY connect used to trigger a MDIO scan due to a bug fixed in
the meantime.  It's unclear if bcm-sf2 wants to connect to PHY @ addr 0 or
is scanning the bus, passing -1 here should keep it functional either way.
Signed-off-by: NAlex Marginean <alexandru.marginean@nxp.com>
Cc: Jiandong Zheng <jdzheng@broadcom.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

PHY address 0 is a valid PHY address, to scan for all PHYs, pass -1 to
phy_connect(). Passing 0 used to work before be accident, but does no
longer.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: NPatrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: NRamon Fried <rfried.dev@gmail.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

struct sunxi_prcm_reg is naturally packed. There is no need to define it as
packed. Defining it as packed leads to compilation errors with GCC 9.2.1:

  CC      arch/arm/lib/reloc_arm_efi.o
arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’:
:qarch/arm/cpu/armv7/sunxi/psci.c:163:21: error: taking address of packed
member of ‘struct sunxi_prcm_reg’ may result in an unaligned pointer value
[-Werror=address-of-packed-member]
  163 |  sunxi_power_switch(&prcm->cpu_pwr_clamp[cpu], &prcm->cpu_pwroff,
      |                     ^~~~~~~~~~~~~~~~~~~~~~~~~

Remove __packed attribute from struct sunxi_prcm_reg.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

Orangepi Zero Plus 2 is an open-source single-board computer, available
in two Allwinner SOC variants, H3 and H5. We add support for H3 variant
here, as the H5 is already supported.

H3 Orangepi Zero Plus 2 has:
- Quad-core Cortex-A7
- 512MB DDR3
- microSD slot and 8GB eMMC
- Debug TTL UART
- HDMI
- Wifi + BT
- OTG + power supply

Sync dts from linux v5.2 commit:
"ARM: dts: sunxi: h3/h5: Remove stale pinctrl-names entry"
(sha1: 75f9a058838be9880afd75c4cb14e1bf4fe34a0b)
Commit:
"ARM: dts: sun8i: h3: Refactor the pinctrl node names"
(sha1: a4dc791974e568a15f7f37131729b1a6912f4811)
has been avoided as it breaks U-Boot build.
Signed-off-by: NDiego Rondini <diego.rondini@kynetics.com>
Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>