ehci-hcd.c: In function 'ehci_submit_root':
ehci-hcd.c:719: warning: value computed is not used
ehci-hcd.c:748: warning: value computed is not used
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NRemy Bohmer <linux@bohmer.net>

This driver is tested on Sheevaplug platform
Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: NRemy Bohmer <linux@bohmer.net>

This patch fixes the access to the 'ehci' struct elements which should
have been taken care off in 4ef01010
Sorry about that.
Signed-off-by: NVivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: NRemy Bohmer <linux@bohmer.net>

Signed-off-by: NBryan Wu <bryan.wu@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NRemy Bohmer <linux@bohmer.net>

These functions are no longer defined, so remove their prototypes.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NRemy Bohmer <linux@bohmer.net>

The bbt descriptors contains the pointer to the bbt pattern which
are statically initialized memory struct. When relocated to RAM,
these pointers will continue point to NOR flash(or L2 SRAM, or
other boot device). If the contents of NOR flash changed or L2
SRAM disabled, it'll hang the system.
Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

The S3C2410 NAND driver source file is included in the makefile instead of
the object file.
Signed-off-by: NKevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: NScott Wood <scottwood@freescale.com>

nand_util currently uses size_t which is arch dependent and not always a
unsigned long.  Now use loff_t, as does the linux mtd layer.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

The BF537-STAMP Blackfin board had a driver for working with NAND devices
that are simply memory mapped.  Since there is nothing Blackfin specific
about this, generalize the driver a bit so that everyone can leverage it.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NScott Wood <scottwood@freescale.com>

Update chipselect handling in davinci_nand.c so that it can
handle 2 GByte chips the same way Linux does:  as one device,
even though it has two halves with independent chip selects.
For such chips the "nand info" command reports:

  Device 0: 2x nand0, sector size 128 KiB

Switch to use the default chipselect function unless the board
really needs its own.  The logic for the Sonata board moves out
of the driver into board-specific code.  (Which doesn't affect
current build breakage if its NAND support is enabled...)
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NScott Wood <scottwood@freescale.com>

Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option.  It's not just nasty;
it's also unused by any current boards, and doesn't even match the
main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC
on newer chips that support it).

DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30,
match non-BROKEN code paths for 1-bit HW ECC.  The BROKEN code paths
do seem to partially match what MontaVista/TI kernels (4.0/2.6.10,
and 5.0/2.6.18) do ... but only for small pages.  Large page support
is really broken (and it's unclear just what software it was trying
to match!), and the ECC layout was making three more bytes available
for use by filesystem (or whatever) code.

Since this option itself seems broken, remove it.  Add a comment
about the MV/TI compat issue, and the most straightforward way to
address it (should someone really need to solve it).
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NScott Wood <scottwood@freescale.com>

Minor cleanup for DaVinci NAND code:

 - Use I/O addresses from nand_chip; CONFIG_SYS_NAND_BASE won't
   be defined when there are multiple chipselect lines in use
   (as with common 2 GByte chips).

 - Cleanup handling of EMIF control registers
    * Only need one pointer pointing to them
    * Remove incorrect and unused struct supersetting them

 - Use the standard waitfunc; we don't need a custom version

 - Partial legacy cleanup:
    * Don't initialize every board like it's a DM6446 EVM
    * #ifdef a bit more code for BROKEN_ECC

Sanity checked with small page NAND on dm355 and dm6446 EVMs;
and large page on dm355 EVM (packaged as two devices, not one).
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NScott Wood <scottwood@freescale.com>

Signed-off-by: NWolfgang Denk <wd@denx.de>

This patch fixes a build problem noticed on Apollon by using
mtd_dev_by_eb() instead of "/" as done in the Linux UBI version.
So this brings the U-Boot UBI version more in sync with the Linux
version again.
Signed-off-by: NStefan Roese <sr@denx.de>

new chips supported:-
MX25L1605D, MX25L3205D, MX25L6405D, MX25L12855E
out of which MX25L6405D and MX25L12855E tested on Kirkwood platforms

Modified the Macronix flash support to use 2 bytes of device id instead of 1
This was required to support MX25L12855E
Signed-off-by: NPiyush Shah <spiyush@marvell.com>
Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Looks like when I was encoding the sector sizes, I forgot to divide by 8
(due to the stupid marketing driven process that declares all sizes in
useless megabits and not megabytes).
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

This patch looks okay on u-boot-net.git/next branch
but when it was merged to u-boot.git/master the last line is missing
Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
Acked-by: NBen Warren <biggerbadderben@gmail.com>

NAND module should not modify EMIF registers unrelated to CS2
that is used for NAND, i.e. do not modify EWAIT config register
or registers for other Chip Selects.

Without this patch, EMIF configurations made in board_init()
will be invalidated.
Signed-off-by: NThomas Lange <thomas@corelatus.se>

Kirkwood family controllers are highly integrated SOCs
based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core.

SOC versions supported:-
1) 88F6281-A0       define CONFIG_KW88F6281_A0
2) 88F6192-A0       define CONFIG_KW88F6192_A0

Other supported features:-
1) get_random_hex() fucntion
2) PCI Express port initialization
3) NS16550 driver support

Contributors:
Yotam Admon <yotam@marvell.com>
Michael Blostein <michaelbl@marvell.com
Reviewed-by: NRonen Shitrit <rshitrit@marvell.com>
Acked-by: NStefan Rose <sr@denx.de>
Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>

Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Reviewed-by: NIra W. Snyder <iws@ovro.caltech.edu>
Tested-by: NIra W. Snyder <iws@ovro.caltech.edu>
Acked-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Make DMA transactions snoopable so that CPUs can keep caches up-to-date.
This allows dma transactions to be used for operations such as memory
copies without any additional cache control operations.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Also update dmacpy()'s argument order to match memcpy's and use
phys_addr_t/phy_size_t for address/size arguments
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The Channel Start (CS) bit in the Mode Register (MR) should actually be
cleared as the comment in the code suggests.  Previously, CS was being
set, not cleared.

Assuming normal operation of the DMA engine, this change shouldn't have
any real affect.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Support DMA transfers larger than the DMA controller's limit of
(2 ^ 26 - 1) bytes
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

DMA support is now enabled via the CONFIG_FSL_DMA define instead of the
previous CONFIG_DDR_ECC
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This patch allows the guard time parameter to be set in
the Atmel LCDC driver.

By default, the previous value of 1 is used, unless the
setting is defined elsewhere.
Signed-off-by: NMark Jackson <mpfj@mimc.co.uk>

If doing a pure write with register address and data (not a read/write
combo transfer), we don't set the initial transfer length properly which
ends up causing only the register address to be transferred.

While we're here, fix the i2c_write() parameter description of the buffer.
Signed-off-by: NPeter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

This patch adds a SPI driver for the Marvell Kirkwood SoC's.
Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>

UART hardware on i.MX27 is the same as on the i.MX31 so we just
need to provide the driver with correct address of the registers.
Signed-off-by: NIlya Yanok <yanok@emcraft.com>

All drivers need to be converted to CONFIG_NET_MULTI.
This patch converts the dm9000 driver.
Signed-off-by: NThomas Smits <ts.smits@gmail.com>
Signed-off-by: NRemy Bohmer <linux@bohmer.net>
Signed-off-by: NBen Warren <biggerbadderben@gmail.com>

This patch adds a egiga driver for the Marvell Kirkwood SoC's.

Contributors:
Yotam Admon <yotam@marvell.com>
Michael Blostein <michaelbl@marvell.com
Reviewed-by: NRonen Shitrit <rshitrit@marvell.com>
Acked-by: NStefan Rose <sr@denx.de>
Signed-off-by: NPrafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: NBen Warren <biggerbadderben@gmail.com>

 From 584b5fbd4abfc43f920cc1c329633e03816e28be Mon Sep 17 00:00:00 2001
From: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Date: Wed, 20 May 2009 18:26:01 -0400
Subject: [PATCH] Standardize the use of MCFFEC_TOUT_LOOP as a udelay(1) loop counter.
Signed-off-by: NRichard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: NBen Warren <biggerbadderben@gmail.com>

Signed-off-by: NBen Warren <biggerbadderben@gmail.com>

Added CONFIG_NET_MULTI to all Davinci boards
Removed all calls to Davinci network driver from board code
Added cpu_eth_init() to cpu/arm926ejs/cpu.c
Signed-off-by: NBen Warren <biggerbadderben@gmail.com>

 Removed pointless #ifdefs
 Moved functions around in file in preparation for switch to newer API
Signed-off-by: NBen Warren <biggerbadderben@gmail.com>

This driver has been renamed davinci_emac.c
Signed-off-by: NBen Warren <biggerbadderben@gmail.com>