There is currently one config option (CONFIG_NET_RETRY_COUNT) that
is available to tune the retries of the network stack.
Unfortunately, it is global to all protocols, and the value is
interpreted differently in all of them.

Add a new environment variable that directly sets the retry period for
BOOTP timeouts. If this new value is not set, the period is still derived
from the default number of retries, or from CONFIG_NET_RETRY_COUNT if
defined. When both the new variable is set and CONFIG_NET_RETRY_COUNT
is defined, the variable has precedence.
Signed-off-by: NAlexandre Messier <amessier@tycoint.com>

doc: Remove any reference to CONFIG_MODEM_SUPPORT, CONFIG_CMD_HWFLOW, CONFIG_HWFLOW and friends from the documentation.
Signed-off-by: NDavid Müller <d.mueller@elsoft.ch>

Add trivial support for changing the U-Boot command prompt string
by setting PS1 and PS2 environment variables. Only static variables
are supported.
Signed-off-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NMinkyu Kang <mk7.kang@samsung.com>

Add support for TPM ST33ZP24 spi.

The ST33ZP24 does have a spi interface.
The transport protocol is proprietary.

For spi we are relying only on DM_SPI.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NChristophe Ricard <christophe-h.ricard@st.com>

Add support for TPM ST33ZP24 family with i2c.

For i2c we are relying only on DM_I2C.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NChristophe Ricard <christophe-h.ricard@st.com>

clang-3.8 reports that these functions are unused, remove them.  As this
is the last part of CONFIG_MODEM_SUPPORT_DEBUG, drop that from README.
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

Enabling this function always removes some class of string saftey issues.
The size change here in general is about 400 bytes and this seems a reasonable
trade-off.

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Peter Robinson <pbrobinson@gmail.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Adrian Alonso <aalonso@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

* There is no boards.cfg anymore, so drop (1).
* Creating flash.c and u-boot.lds seems not mandatory as well.
* Adjusting the enumerators for the above implicitly fixed for
  double items numbered (3).
Signed-off-by: NPhil Sutter <phil@nwl.cc>
Acked-by: NStefan Roese <sr@denx.de>
Reviewed-by: NTom Rini <trini@konsulko.com>

First (small) pass at tidying up the README file, including:

 * remove references to obsolete CREDITS file
 * remove (some) references to obsolete boards.cfg file
 * remove at least one reference to a "scrapped" board
 * cut down unnecessarily detailed directory hierarchy
 * bunch of grammar and spelling tweaks
Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca>

MC and debug server are not board-specific. Move reserving memory to SoC
file, using the new board_reserve_ram_top function. Reduce debug server
memory by 2MB to make room for secure memory.

In the system with MC and debug server, the top of u-boot memory
is not the end of memory. PRAM is not used for this reservation.
Signed-off-by: NYork Sun <yorksun@freescale.com>

As the name may be confusing, the CONFIG_SYS_MEM_TOP_HIDE reserves
some memory from the end of ram, tracked by gd->ram_size. It is not
always the top of u-boot visible memory. Rewrite the macro with a
weak function to provide flexibility for complex calcuation. Legacy
use of this macro is still supported.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Secure memory is at the end of memory, separated and reserved
from OS, tracked by gd->secure_ram. Secure memory can host
MMU tables, security monitor, etc. This is different from PRAM
used to reserve private memory. PRAM offers memory at the top
of u-boot memory, not necessarily the real end of memory for
systems with very large DDR. Using the end of memory simplifies
MMU setup and avoid memory fragmentation.

"bdinfo" command shows gd->secure_ram value if this memory is
marked as secured.
Signed-off-by: NYork Sun <yorksun@freescale.com>

LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP
personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc.
So renaming existing LS2085A code base to reflect LS2080A (Prime personality)
Signed-off-by: NPratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: Dropped #ifdef in cpu.c for cpu_type_list]
Reviewed-by: NYork Sun <yorksun@freescale.com>

This macro is no longer used, so just reap it.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Now that i8042 uses driver model, adjust other mentions of it and remove old
code that is no-longer used. Update the README and unify the keyboard text
into one place.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

This option is mentioned but does not do anything. Drop it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

CONFIG_CONSOLE_CURSOR, CONFIG_SYS_CONSOLE_BLINK_COUNT and
CONFIG_CONSOLE_TIME are not used by any board. The implementation is not
great and stands in the way of a refactor of i8042. Drop these for now.
They can be re-introduced quite easily later, perhaps with driver-model
real-time-clock (RTC) support.

When reintroducing, it might be useful to make a few changes:
- Blink time would be more useful than blink count
- The confusing #ifdefs should be avoided
- The time functions should support driver model
- It would be best keyed off console_tstc() or some similar idle loop
    rather than a particular input driver (i8042 in this case)
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

Adjust the cros_ec keyboard driver to support driver model. Make this the
default for all Exynos boards so that those that use a keyboard will build
correctly with this driver.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Prior to commit 5ba534d2 ("arm: Switch 32-bit ARM to using generic
global_data setup") we used to have assembly code that configured the
malloc_base address.

Since this commit we use the board_init_f_mem() function in C to setup
malloc_base address.

In board_init_f_mem() there was a deliberate choice to support only
early malloc() or full malloc() in SPL, but not both.

Adapt this logic to allow both to be used, one after the other, in SPL.

This issue has been observed in a Congatec board, where we need to
retrieve the manufacturing information from the SPI NOR (the SPI API
calls malloc) prior to configuring the DRAM. In this case as malloc_base
was not configured we always see malloc to fail.

With this change we are able to use malloc in SPL prior to DRAM gets
initialized.

Also update the CONFIG_SYS_SPL_MALLOC_START entry in the README file.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Support two i2c masters per FPGA.
Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>
Acked-by: NHeiko Schocher <hs@denx.de>

TFTP source and destination port variable names are
'tftpsrcp' and 'tftpdstp' in the code, but 'tftpsrcport'
and 'tftpdstport' in the README file. Fix the README.

Add environment variable 'tftptimeoutcountmax'. As per the
comments about the global variable tftp_timeout_count_max,
make sure tftptimeoutcountmax is nonnegative.

Introduce configuration option CONFIG_NET_TFTP_VARS,
which controls whether environment variables tftpblocksize,
tftptimeout, and tftptimoueoutcountmax are read by the TFTP
client code. CONFIG_NET_TFTP_VARS defaults to y but can be
set to n by targets with to tight size contraints.

Make bf527-ezkit set CONFIG_NET_TFTP_VARS to n to keep the
target size below limit.

sync with linux v4.2

commit 64291f7db5bd8150a74ad2036f1037e6a0428df2
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Sun Aug 30 11:34:09 2015 -0700

    Linux 4.2

This update is needed, as it turned out, that fastmap
was in experimental/broken state in kernel v3.15, which
was the last base for U-Boot.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Tested-by: NEzequiel Garcia <ezequiel@vanguardiasur.com.ar>

As there is no TCG specification or recommendation for i2c TPM 1.2,
move tpm_tis_i2c driver to tpm_i2c_infineon. Other tpm vendors like Atmel
or STMicroelectronics may have a different transport protocol for i2c.
Signed-off-by: NChristophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NSimon Glass <sjg@chromium.org>

So far VxWorks bootline can be contructed from various environment
variables, but when these variables do not exist we get these from
corresponding config macros. This is not helpful as it requires
rebuilding U-Boot, and to make sure these config macros take effect
we should not have these environment variables. This is a little
bit complex and confusing.

Now we change the logic to always contruct the bootline from
environments (the only single source), by adding two new variables
"bootdev" and "othbootargs", and adding some comments about network
related settings mentioning they are optional. The doc about the
bootline handling is also updated.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Tested-by: NHannes Schmelzer <oe5hpm@oevsv.at>

We run 4 Arndale boards in our automated test framework, they have
been running quite happily for quite some time using a Debian Wheezy
userspace.

However when upgrading to a Debian Jessie we started seeing frequent
segmentation faults from gcc when building the kernel, to the extent
that it is unable to successfully build the kernel twice in a row, and
often fails on the first attempt.

Searching around I found https://bugs.launchpad.net/arndale/+bug/1081417
which pointed towards http://www.spinics.net/lists/kvm-arm/msg03723.html
and CPU Errata 773022 and 774769.

This errata needs to be applied to all processors in an SMP system,
meaning that the usual strategy of applying them in
arch/arm/cpu/armv7/start.S is not appropriate (since that applies to
the boot processor only). Instead we apply these errata in the secure
monitor which is code that is traversed by all processors as they are
brought up.

The net affect on Arndale is that ACTLR changes from 0x40 to
0x2000042. I ran 17 kernel compile iterations overnight with no
segfaults.

Runtime testing was done on our v2014.10 based branch and forward
ported (with only minimal and trivial contextual conflicts) to current
master, where it has been build tested only.

I suppose in theory these errata apply to any Exynos5250 based boards,
but Arndale is the only one I have access to and I have therefore
chosen to be conservative and only apply it there.

Also, reorder CONFIG_ARM_ERRATA_794072 in README to make the list
numerically sorted.
Signed-off-by: NIan Campbell <ian.campbell@citrix.com>

The driver assumed that I2C1 and I2C2 were always enabled,
and if they were not, then an asynchronous abort was (silently)
raised, to be caught much later on in the Linux kernel.

Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4
are.

To make the change binary-invariant, declare I2C1 and I2C2 in
every include/configs/ file which defines CONFIG_SYS_I2C_MXC.

Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and
CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed
(CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE)
config options.
Signed-off-by: NAlbert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>

This arch does not seem to be supported / used at all in the current
U-Boot mainline source tree any more. So lets remove the core u8500 code
and code that was only referenced by this platform.

Please note that this patch also removes these config options:

- CONFIG_PL011_SERIAL_RLCR
- CONFIG_PL011_SERIAL_FLUSH_ON_INIT

As they only seem to be referenced by u8500 based boards. Without any
such board in the current code, these config option don't make sense
any more. Lets remove them as well.

If someone still wants to use this platform, then please send patches
to re-enable support by adding at least one board that references this
code.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: John Rigby <john.rigby@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The address of the I2C TPM is now defined in the device tree so there is no
need for the CONFIG options.

Remove them from the README and board config to avoid confusion.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NChristophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Add Kconfig options in preparation for moving boards to use Kconfig.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Add workaround for Cortex-A15 ARM erratum 801819 which says in summary
that "A livelock can occur in the L2 cache arbitration that might
prevent a snoop from completing. Under certain conditions this can
cause the system to deadlock. "

Recommended workaround is as follows:
Do both of the following:

1) Do not use the write-back no-allocate memory type.
2) Do not issue write-back cacheable stores at any time when the cache
is disabled (SCTLR.C=0) and the MMU is enabled (SCTLR.M=1). Because it
is implementation defined whether cacheable stores update the cache when
the cache is disabled it is not expected that any portable code will
execute cacheable stores when the cache is disabled.

For implementations of Cortex-A15 configured without the “L2 arbitration
register slice” option (typically one or two core systems), you must
also do the following:

3) Disable write-streaming in each CPU by setting ACTLR[28:25] = 0b1111

So, we provide an option to disable write streaming on OMAP5 and DRA7.
It is a rare condition to occur and may be enabled selectively based
on platform acceptance of risk.

Applies to: A15 revisions r2p0, r2p1, r2p2, r2p3 or r2p4 and REVIDR[3]
is set to 0.

Note: certain unicore SoCs *might* not have REVIDR[3] not set, but
might not meet the condition for the erratum to occur when they donot
have ACP (Accelerator Coherency Port) hooked to ACE (AXI Coherency
Extensions). Such SoCs will need the work around handled in the SoC
specific manner, since there is no ARM generic manner to detect such
configurations.

Based on ARM errata Document revision 18.0 (22 Nov 2013)
Suggested-by: NRichard Woodruff <r-woodruff2@ti.com>
Suggested-by: NBrad Griffis <bgriffis@ti.com>
Reviewed-by: NBrad Griffis <bgriffis@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>

In order to achieve reproducible builds in U-Boot, timestamps that are defined
at build-time have to be somewhat eliminated. The SOURCE_DATE_EPOCH environment
variable allows setting a fixed value for those timestamps.

Simply by setting SOURCE_DATE_EPOCH to a fixed value, a number of targets can be
built reproducibly. This is the case for e.g. sunxi devices.

However, some other devices might need some more tweaks, especially regarding
the image generation tools.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>

FASTBOOT is defined both by CONFIG_USB_FUNCTION_FASTBOOT AND CONFIG_CMD_FASTBOOT, so it doesn't
make much sense to have a CONFIG_USB_FASTBOOT prefix for fastboot-specific options, especially
given that other config options for fastboot use the CONFIG_FASTBOOT prefix.

This replaces the CONFIG_USB_FASTBOOT prefix with CONFIG_FASTBOOT, for consistency.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>

USB download gadget functions such as thor and dfu have a separate config option
for the USB gadget part of the code, independent from the command part.
This switches the fastboot USB gadget to the same scheme, for better
consistency.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>
Tested-by: NLukasz Majewski <l.majewski@samsung.com>

Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)

This introduces a coherent scheme for naming USB download gadget and functions
config options. The download USB gadget config option is moved to
CONFIG_USB_GADGET_DOWNLOAD for better consistency with other gadgets and each
function's config option is moved to a CONFIG_USB_FUNCTION_ prefix.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>
Tested-by: NLukasz Majewski <l.majewski@samsung.com>

Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)

The agreed split of the top of memory is 256M for debug server and 256M
 for MC. This patch implements the split.

 In addition, the MC mem must be 512MB aligned, so the amount of memory
 to hide must be 512MB to achieve that alignment.
Signed-off-by: NStuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: NYork Sun <yorksun@freescale.com>

Since the help text is added in drivers/mtd/spi/Kconfig
Signed-off-by: NJagan Teki <jteki@openedev.com>

Since the help text is added in drivers/mtd/spi/Kconfig
Signed-off-by: NJagan Teki <jteki@openedev.com>

Since the help text is added in drivers/mtd/spi/Kconfig
Signed-off-by: NJagan Teki <jteki@openedev.com>

This patch adds CONFIG_SPI_FLASH_DATAFLASH descrition on README
file for more readble for users.
Signed-off-by: NJagan Teki <jteki@openedev.com>