Now that commit 3e57f879 ("mtd: nand: raw: denali: Assert reset
before deassert") added the reset assertion, this code in the board
file is unneeded.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Move the bus initialization code to this driver from board files.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

I actually do not see this used these days because eMMC or NAND is used
for non-volatile devices. Dump the burden to maintain this crappy code.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

I do not understand the changes made to these files by
commit f7ae49fc ("common: Drop log.h from common header").

  git show f7ae49fc -- arch/arm/mach-uniphier/

None of them uses the log function feature.

Simply revert the changes made to these files.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Move this header out of the common header.
Signed-off-by: NSimon Glass <sjg@chromium.org>

The comment /* deassert reset */ is wrong. It asserts the reset.

It no longer needs to stay in SPL. The NAND controller reset is
handled  in the driver. So, this assert can be moved to the
board_init() of U-Boot proper.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Now that the reset controlling of the Denali NAND driver (denali_dt.c)
works for this platform, remove the adhoc reset deassert code.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: NTom Rini <trini@konsulko.com>

Remove unnecessary DECLARE_GLOBAL_DATA_PTR and header includes.

<common.h> has been replaced with <linux/errno.h> and <linux/printk.h>.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The XIRQ pins are now set up on the Linux side by the GPIO hogging.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This work-around has been here in U-Boot because the AIDET and GPIO
drivers were missing in the upstream Linux.  Both are now available
in Linus' tree:
  - drivers/irqchip/irq-uniphier-aidet.c
  - drivers/gpio/gpio-uniphier.c
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This is now set up by the pinctrl driver when the NAND driver is
probed.  Remove the legacy code.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This SoC is too old.  It is difficult to maintain any longer.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

It has been a while since ARM Trusted Firmware supported UniPhier SoC
family.  U-Boot SPL was intended as a temporary loader that runs in
secure world.  It is a maintenance headache to support two different
boot mechanisms.  Secure firmware is realm of ARM Trusted Firmware
and now U-Boot only serves as a non-secure boot loader for UniPhier
ARMv8 SoCs.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Fix warnings reported by sparse:
 - ... was not declared. Should it be static?"
 - cast to restricted __be32

While fixing those, the type conflict of cci500_init() was found.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Add the boot device table and reset deassertion for eMMC.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

For LD11 and LD20 SoCs, the RST_n pin is asserted by default.  If
the EXT_CSD[162], bit[1:0] (RST_n_ENABLE) is fused, the eMMC device
would stay in the reset state until its RST_n pin is deasserted by
software.

Currently, this is cared by an ad-hoc way because the eMMC hardware
reset provider is not supported in U-Boot for now.  This code should
be re-written once the "mmc-pwrseq-emmc" binding is supported.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Initial support for PXs3 SoC.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

There are similar functions that look up SoC data by the SoC ID.
The new macro UNIPHIER_DEFINE_SOCDATA_FUNC will be helpful to
avoid the code duplication.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Currently, uniphier_get_soc_type() converts the SoC ID (this is
read from the revision register) to an enum symbol to use it for SoC
identification.  Come to think of it, there is no need for the
conversion in the first place.  Using the SoC ID from the register
as-is a straightforward way.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

We may want to run different firmware before running U-Boot.  For
example, ARM Trusted Firmware runs before U-Boot, making U-Boot
a non-secure world boot loader.  In this case, the SoC might be
initialized there, which enables us to skip SPL entirely.

This commit removes "select SPL" to make it configurable.  This
also enables the Multi SoC support for the UniPhier ARMv8 SoCs.
(CONFIG_ARCH_UNIPHIER_V8_MULTI)  Thanks to the driver model and
Device Tree, the U-Boot proper part is now written in a generic way.
The board/SoC parameters reside in DT.  The Multi SoC support
increases the memory footprint a bit, but the U-Boot proper does
not have strict memory constraint.  This will mitigate the per-SoC
(sometimes per-board) defconfig burden.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

These are file-internal and constant.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Initialize SBC and Support Card in U-Boot proper instead of SPL.

We may run different firmware (ex. ARM Trusted Firmware) before
U-Boot, and basic SoC initialization may be done there.  In that
case, SPL may not be used.

The motivation for preparing SBC and Support Card in SPL was to use
LED for early debugging, but this is not mandatory to boot SoCs.
With this commit, LED will be unavailable in SPL, but we can use a
debug serial instead.  So, this change will not be a big deal.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The code here is cluttered due to the switch statement.  Introduce a
table of callbacks to clean up the initialization code across SoCs.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

At first, we thought the LD20 PLL setting would be board dependent,
but this argument turned out unneeded after all.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Raise the VDD09 voltage line to 1.0V to suppress VBO noise.
This errata work-around code is needed only for ES1.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

 - Initialize PLLs (SPL initializes only DPLL to save the precious
   SPL memory footprint)
 - Adjust CPLL/MPLL to the final tape-out frequency
 - Set the Cortex-A53 clock to the maximum frequency since it is
   running at 500MHz (SPLL/4) on startup
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot
proper.  Split the common code into pll-base-ld20.c for easier
re-use.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The PLL for the DRAM interface must be initialized in SPL, but the
others can be delayed until U-Boot proper.  Move them from SPL to
U-Boot proper to save the precious SPL memory footprint.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This is the last code in the mach-uniphier/pinctrl/ directory.
Push the remaining code out to delete the directory entirely.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The NAND subsystem has not supported the Driver Model yet, but the
NAND pin-mux data are already in the pinctrl drivers.  Use them by
calling pinctrl_generic_set_state() directly.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Currently, the UniPhier platform calls several init functions in the
following order:

  [1] spl_board_init()
  [2] board_early_init_f()
  [3] board_init()
  [4] board_early_init_r()
  [5] board_late_init()

The serial console is not ready at the point of [2], so we want to
avoid using [2] from the view point of debuggability.  Fortunately,
all of the initialization in [2] can be delayed until [3].  I see no
good reason to split into [3] and [4].  So, merge [2] through [4].
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

I will carry this work-around until it is cared in the kernel.
This looks up the AIDET node and sets up a register to handle
active low interrupt signals.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This is a low-cost ARMv8 SoC from Socionext Inc.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This is the first ARMv8 SoC from Socionext Inc.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Eliminate the "ph1"_ prefixes from function names because "uniphier_"
describes the SoC familiy better.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too
long.  It would not hurt to drop "PH1_" because "UNIPHIER_" already
well specifies the SoC family.  Also, rename files for consistency.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

These headers are only included locally in arch/arm/mach-uniphier/.
There is no reason to export them by putting in the mach/ directory.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The DDR SDRAM initialization code has not been mainlined yet, but
U-Boot proper should work.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The DDR SDRAM initialization code has not been mainlined yet, but
U-Boot proper should work.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>