Signed-off-by: NTom Rini <trini@konsulko.com>

Rsync all defconfig files using moveconfig.py
Signed-off-by: NTom Rini <trini@konsulko.com>

Fixes:
 - rockchip: rk3399: fix missing braces in full pinctrl

Braces around the error-case for rk3399_pinctrl_set_pin_pupd lead to
an unconditional (and unintended) return from the function without it
ever setting pin-configurations.

Fix it.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Reported-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: NGuillaume GARDET <guillaume.gardet@free.fr>

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

TrueType fixes and documentation

Last-minute fixes for 2019.1:
- clamp DRAM size to below 32bit for 32bit targets to support 4GB
- fix copyright notice on some Rockchip-contributed files
- adjust vdd_log for the RK3399-Q7 to improve stability in some workloads

Building peach-pi smdk5420 and peach-pit with thumb mode for SPL
ends-up in the following error:

Error: Thumb encoding does not support an immediate here -- `msr cpsr_c,#0x13|0xC0'

Use an intermediate register to be able to use thumb for exynos5 SPL.
Signed-off-by: NGuillaume GARDET <guillaume.gardet@free.fr>

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This patch sets VDD_LOG to 950 mV on RK3399-Q7.
This is required to address stability issues on Puma
in heavy-load use-cases.
Reported-by: NAssaf Agmon <assaf@r-go.io>
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: NChristoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This patch enables the full pinctrl driver in the defconfig
for the RK3399-Q7.
Signed-off-by: NChristoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This patch adds a Kconfig option to enable the full pinctrl driver
for the RK3399. This flag needs to be enabed in order to get the
features of the full pinctrl driver compiled in (i.e. a .set_state()
callback).
Signed-off-by: NChristoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

The current pinctrl driver for the RK3399 has a range of qulity issues.
E.g. it only implements the .set_state_simple() callback, it
does not parse the available pinctrl information from the DTS
(instead uses hardcoded values), is not flexible enough to cover
devices without 'interrupt' field in the DTS (e.g. PWM),
is not written generic enough to make code reusable among other
rockchip SoCs...

This patch addresses these issues by reimplementing the whole driver
from scratch using the .set_state() callback.
The new implementation covers all featurese of the old code
(i.e. it supports pinmuxing and pullup/pulldown configuration).

This patch has been tested on a RK3399-Q7 SoM (Puma).
Signed-off-by: NChristoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

pinctrl_decode_pin_config_dm() is basically a feature-equivalent
implementation of pinctrl_decode_pin_config(), which operates
on struct udevice devices and uses the dev_read_*() API.
Signed-off-by: NChristoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This patch enables the PWM regulator driver in the defconfig
for the RK3399-Q7.
Signed-off-by: NChristoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This patch allows to enable the PWM regulator driver
independent for U-Boot and SPL.
Signed-off-by: NChristoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This patch eliminates the non-standard entries "rockchip,pwm_id"
and "rockchip,pwm_voltage". They are neither documented nor
read out by any driver.

Additionally it introduces the entry regulator-init-microvolt
and sets it to 900 mV, which is the default target value
for VDD_LOG.
Signed-off-by: NChristoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Rockchip may use this sdram copy of source code for both open source
and internal project, update the license to use both GPL2.0+ and
BSD-3 Clause.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

All the source code of sdram_rk3036.c are from Rockchip, update the
copyright to owned by Rockchip.

Because rockchip may use this copy of code both for open source
project and internal project, update the license to use both
GPL2.0+ and BSD-3 Clause.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This is workaround for issue we can't get correct size for 4GB ram
in 32bit system and available before we really need ram space
out of 4GB, eg.enable ARM LAPE(rk3288 supports 8GB ram).
The size of 4GB is '0x1 00000000', and this value will be truncated
to 0 in 32bit system, and system can not get correct ram size.
Rockchip SoCs reserve a blob of space for peripheral near 4GB,
and we are now setting SDRAM_MAX_SIZE as max available space for
ram in 4GB, so we can use this directly to workaround the issue.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Tested-By: NVagrant Cascadian <vagrant@debian.org>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>

Migration plan for DM_SPI_FLASH is v2019.07 since it
depends on DM_SPI migration.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

- v2019.04 for no dm conversion drivers
- v2019.07 for partially converted drivers.

Note: there were many updates on this deadline, so better
not update this again.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

This patch adds Hynix H27UBG8T2BTR id table as part of raw nand,
these chips were available in some A20-olinuxino-micro boards.
Signed-off-by: NNikolai Zhubr <n-a-zhubr@yandex.ru>
[jagan: add proper commit message]
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Current driver doesn't check if the destination pointer is NULL.
This cause the data from the FIFO to be stored inside the internal
SDRAM ( address 0 ).

The patch add simple check if the destination pointer is NULL.
Signed-off-by: NStefan Mavrodiev <stefan@olimex.com>
Acked-by: NJagan Teki <jagan@openedev.com>
[jagan: fix commit message]
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

imx for 2019.01

- introduce support for i.MX8M
- fix size limit for Vhybrid / pico boards
- several board fixes
- w1 driver for MX2x / MX5x

U-Boot binary has grown in such a way that it goes beyond the reserved
area for the environment variables.

Running "saveenv" causes U-Boot to hang because of this overlap.

Fix this problem by increasing the CONFIG_ENV_OFFSET size.

Also, in order to prevent this same problem in the future, use
CONFIG_BOARD_SIZE_LIMIT, which will detect the overlap in build-time.

CONFIG_BOARD_SIZE_LIMIT does not accept math expressions, so declare
CONFIG_ENV_OFFSET with its direct value instead.
Signed-off-by: NFabio Estevam <festevam@gmail.com>
Acked-by: NOtavio Salvador <otavio@ossystems.com.br>

This commit adds support for device tree and enumeration via device model
for the Vybrid's NFC NAND driver.
Signed-off-by: NLukasz Majewski <lukma@denx.de>

This commit provides code to add proper entry to Kconfig to enable
support for VF610 device tree aware driver.
Signed-off-by: NLukasz Majewski <lukma@denx.de>

Without this change it is possible that Vybrid's NFC driver malloc() call
will obtain some memory used (and correctly free'd) by some previous
driver (in this case pinctrl for Vybrid).

As a result some fields of struct nfc - in out case mtd->_get_device - are
"pre initialized" with some random values.

On the latter stage of booting, when e.g. somebody calls 'mtdparts default'
the "data abort" is observed when __get_mtd_device() function is called.

The mtd->_get_device pointer is not NULL and wrong value is referenced.
Signed-off-by: NLukasz Majewski <lukma@denx.de>
Reviewed-by: NStefan Agner <stefan.agner@toradex.com>

board/ge/mx53ppd/mx53ppd.c: In function 'board_late_init':
board/ge/mx53ppd/mx53ppd.c:359:23: error: passing argument 2 of 'read_vpd' from incompatible pointer type [-Werror=incompatible-pointer-types]
  res = read_vpd(&vpd, vpd_callback);
                       ^~~~~~~~~~~~
In file included from board/ge/mx53ppd/mx53ppd.c:37:0:
board/ge/mx53ppd/../../ge/common/vpd_reader.h:19:5: note: expected 'int (*)(struct vpd_cache *, u8,  u8,  u8,  size_t,  const u8 *) {aka int (*)(struct vpd_cache *, unsigned char,  unsigned char,  unsigned char,  unsigned int,  const unsigned char *)}' but argument is of type 'int (*)(void *, u8,  u8,  u8,  size_t,  const u8 *) {aka int (*)(void *, unsigned char,  unsigned char,  unsigned char,  unsigned int,  const unsigned char *)}'
int read_vpd(struct vpd_cache *cache,
     ^~~~~~~~
cc1: all warnings being treated as errors
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Acked-by: NStefano Babic <sbabic@denx.de>

Currently, U-Boot ignores the BBT stored in the last 4 blocks of NAND
flash because the NAND_BBT_USE_FLASH flag is not set.  This leads to
two issues:

* U-Boot silently uses a memory-only BBT which is initialized with all
  blocks marked as good.  This means, actual bad blocks are marked good
  and U-Boot might try writing to or reading from them.
* The BBT in flash, which will be created once Linux boots up, is not
  off limits for a driver ontop, like UBI.  While it does not seem to
  consistently produce an error, sometimes UBI will fail to attach
  because the BBT blocks obviously don't contain valid UBI data.

To fix this, this patch sets the CONFIG_SYS_NAND_USE_FLASH_BBT option,
which is used in ./drivers/mtd/nand/raw/mxs_nand.c to decide whether
a BBT in flash is used.
Signed-off-by: NHarald Seiler <hws@denx.de>

Remove unused DDRC register macros.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy
firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to
DRAM.

The boot log with Arm trusted firmware console enabled:
"
U-Boot SPL 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800)
PMIC:  PFUZE100 ID=0x10
Normal Boot
Trying to boot from MMC2
NOTICE:  Configureing TZASC380
NOTICE:  BL31: v1.5(release):p9.0.0_1.0.0-beta-20180928-8-ge09c4b62-dirty
NOTICE:  BL31: Built : 09:28:54, Nov  8 2018
lpddr4 swffc start
NOTICE:  sip svc init

U-Boot 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800)

CPU:   Freescale i.MX8MQ rev2.0 at 1000 MHz
Reset cause: POR
Model: Freescale i.MX8MQ EVK
DRAM:  3 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
In:    serial
Out:   serial
Err:   serial
Net:
Warning: ethernet@30be0000 using MAC address from ROM
eth0: ethernet@30be0000
Hit any key to stop autoboot:  0
"
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Introduce DDR driver for i.MX8M. The driver will be used by SPL to
initialze DDR PHY and DDR Controller.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Introduce lpddr4 header file
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

No need to build bootaux in SPL stage
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Build flash.bin for i.MX8MQ, it will include signed hdmi firmware,
spl, ddr firmware, fit image(bl31.bin, u-boot-nodtb.bin, dtb).
Burn it to 33KB offset of SD card.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

imximage.cfg will be used to generate the flash.bin
Signed-off-by: NPeng Fan <peng.fan@nxp.com>