The use of ARMv8.3 pointer authentication (PAuth) is governed by fields
in HCR_EL2, which trigger a 'trap to EL2' if not enabled. The reset
value of these fields is 'architecturally unknown' so we must ensure
that the fields are enabled (to disable the traps) if we are entering
the kernel at EL1.

The APK field disables PAuth instruction traps and the API field
disables PAuth register traps

Add code to disable the traps in armv8_switch_to_el1_m. Prior to doing
so, it checks fields in the ID_AA64ISAR1_EL1 register to ensure pointer
authentication is supported by the hardware.

The runtime checks require a second temporary register, so add this to
the EL1 transition macro signature and update 2 call sites.
Signed-off-by: NPeter Hoyes <Peter.Hoyes@arm.com>

CNTFRQ_EL0 is only writable from the highest supported exception
level on the platform. For Armv8-A, this is typically EL3, but
technically EL2 and EL3 are optional so it may need to be
initialized at EL2 or EL1. For Armv8-R, the highest exception
level is always EL2.

This patch moves the initialization outside of the switch_el
block and uses a new macro branch_if_not_highest_el which
dynamically detects whether it is at the highest supported
exception level.

Linux's docs state that CNTFRQ_EL0 should be initialized by the
bootloader. If not set, the the U-Boot prompt countdown hangs.
Signed-off-by: NPeter Hoyes <Peter.Hoyes@arm.com>

Allow EL3 to handle all the External Abort and SError interrupt
exception occur in all exception levels.
Signed-off-by: NChee Hong Ang <chee.hong.ang@intel.com>

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: NTom Rini <trini@konsulko.com>

macro branch_if_master checks master CPU via (Aff3 & (Aff2:Aff1:Aff0))
it is simple but a little obscure.

fix by checking Affx fields within MPIDR_EL1 directly.
Signed-off-by: Nzijun_hu <zijun_hu@htc.com>

PSCI implementation needs the SMC instruction to be enabled.
Signed-off-by: NHongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.

The architecture information will be got through checking FIT image,
then U-Boot will load 32-bit OS or 64-bit OS automatically.
Signed-off-by: NEbony Zhu <ebony.zhu@nxp.com>
Signed-off-by: NAlison Wang <alison.wang@nxp.com>
Signed-off-by: NChenhui Zhao <chenhui.zhao@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Linux-arm64 require that CNTVOFF_EL2 should be programmed with
a consistent value on all cpus. Initializing CNTVOFF_EL2 at state
transition instead of start.S could prevent potential different value
on cpus if ATF exist and u-boot runs at only one cpu.
Signed-off-by: NDavid Feng <fenghua@phytium.com.cn>

While the Freescale ARMv8 board LS2085A will enter U-Boot both
on a master and a secondary (slave) CPU, this is not the common
behaviour on ARMv8 platforms. The norm is that U-Boot is entered
from the master CPU only, while the other CPUs are kept in
WFI (wait for interrupt) state.

The code determining which CPU we are running on is using the
MPIDR register, but the definition of that register varies with
platform to some extent, and handling multi-cluster platforms
(such as the Juno) will become cumbersome. It is better to only
enable the multiple entry code on machines that actually need
it and disable it by default.

Make the single entry default and add a special
ARMV8_MULTIENTRY KConfig option to be used by the
platforms that need multientry and set it for the LS2085A.
Delete all use of the CPU_RELEASE_ADDR from the Vexpress64
boards as it is just totally unused and misleading, and
make it conditional in the generic start.S code.

This makes the Juno platform start U-Boot properly.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch adds basic constructs in the ARMv8 u-boot code
to handle and apply Cortex-A57 specific erratas.

As and example, the framework showcases how erratas 833069, 826974
and 828024 can be handled and applied.

Later on this framework can be extended to include other
erratas.
Signed-off-by: NBhupesh Sharma <bhupesh.sharma@freescale.com>

a hexadicemal value was missing the "0x" prefix which caused
	assembler error
Signed-off-by: NYehuda Yitschak <yehuday@marvell.com>

Secondary cores need to be released from holdoff by boot release
registers. With GPP bootrom, they can boot from main memory
directly. Individual spin table is used for each core. Spin table
and the boot page is reserved in device tree so OS won't overwrite.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NArnab Basu <arnab.basu@freescale.com>

Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NDavid Feng <fenghua@phytium.com.cn>

Signed-off-by: NWolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: NTom Rini <trini@ti.com>

This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>