U-Boot support board detection at run time and based on it change DT.
This feature is implemented for SOM Kria platforms which contain two
eeproms which contain information about SOM module and CC (Carrier card).
Full U-Boot starts with minimal DT file defined by
CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image.
It is using default setup of board_name variable initializaed to
DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option.

When DTB_RESELECT is enabled board_detection() is called. Keep it your mind
that this code is called before relocation. board_detection() is calling
xilinx_read_eeprom() which fills board_info (xilinx_board_description)
structure which are parsed in board_name_decode().
Based on DT configuration and amount of nvmemX aliases name of the board is
composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev"
<board_revision> "-" <cc_name> "-rev" <cc_revision>.

If CC is not present or more are available it keeps going.

When board name is composed and returned from board_name_decode() it is
assigned to board_name variable which is used by
board_fit_config_name_match() which is called via fdtdec_setup() when it
goes over config options in multi dtb FIT image.

From practical point of view multi DTB image is key point here which has to
contain configs for detected combinations. Unfortunately as of now they
have to be full DTBs and DTBOs are not supported.

That's why configuration like:
config_X {
	description = "zynqmp-board-cc";
	fdt = "board", "cc";
};

needs to be squashed together with:
fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \
arch/arm/dts/zynqmp-cc.dtbo

and only one dtb is in fit:
config_X {
	description = "zynqmp-board-cc";
	fdt = "board-cc";
};

For creating multi DTBs fit image use mkimage -E, e.g.:
mkimage -E -f all.its all.dtb

When DTB_RESELECT is enabled xilinx_read_eeprom() is called before
relocation and it uses calloc for getting a buffer. Because this is dynamic
memory it is not relocated that's why xilinx_read_eeprom() is called again
as the part of board_init(). This second read with calloc buffer placed in
proper position board_late_init_xilinx() can setup u-boot variables as
before.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

When MULTI_DTB_FIT is enabled fit-dtb.blob fit image is created which
contain all DTBs listed by CONFIG_OF_LIST. And with DTB_RELESELECT there is
a need to handle it as one file with DTBs in it not as separate DTBs in
u-boot.its/itb.
That's why extend mkimage_fit_atf.sh to generate u-boot.itb correctly.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Start of DTB should be 64bit aligned that's why also make sure that end is
also 64bit aligned. It is not required but it is nice thing to do.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enabling MULTI_DTB_FIT and DTB_RESELECT can end up with multi DTBs in FIT
image placed and aligned only by 32bits (4bytes). Based on device tree
specification:
"Specifically, the memory reservation block shall be aligned to an 8-byte boundary
and the structure block to a 4-byte boundary."
is 64bit (8bytes) alignment required. That's why make sure that
fit-dtb.blob and u-boot.itb as our primary target images for Xilinx ZynqMP
are all 64bit aligned.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NAndre Przywara <andre.przywara@arm.com>

DT needs to be 64bit aligned. If it is not fdt64_to_cpu will fail when try
to read information about reserved memory. The system ends in exception
without any clue what's going it. That's why detect not aligned DT and
panic to show where the issue is coming from.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add support for changing DT at run time. It is done via board_detection()
which returns platform_id and platform_version which can be used via
board_name_decode() to compose board_local_name string which corresponds
with DT which is should be used.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

There is no need to keep fru_content around. Free this space.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Origin code was allocating only pointers to struct xilinx_board_description
and there was separate allocation for structure self and freeing in case of
failure.
The code is directly allocating space for all structures by one calloc to
simlify logic.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Use variable which points to DEVICE_TREE by default. The reason for this
change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection
can be used for change DTB at run time. That's why there must be reference
in board_fit_config_name_match() via variable instead of hardcoding it
which is sufficient for that use case.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

FRU spec expected \0 for unused symbols but unfortunately a lot of boards
are using spaces instead of \0. That's why after saving it to desc->name
name is checked again and all spaces are converted to \0. This will ensure
that names can be used for string manipulations like concatenation.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable button uclass and also gpio-key driver by default.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable it for TPM usage.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

dev_dbg, dev_err and dev_warn seems to be moved to different header file.
Include dm/device_compat.h file to compile properly.
Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add debug messages to see HW boot mode and also alternative boot mode in
logs directly.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

The commit 573a3811 ("sysreset: psci: support system reset in a generic
way with PSCI") has added support for warm reset via PSCI but this hasn't
been reflected in usage message and user has to look at the code how to run
it. That's why update usage text to make this clear.

Here is full help with updated usage:
ZynqMP> help reset
reset - Perform RESET of the CPU

Usage:
reset - cold boot without level specifier
reset -w - warm reset if implemented
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NIgor Opaniuk <igor.opaniuk@foundries.io>

The first name is taken from command name that's why shouldn't be listed in
help. And commands shouldn't be listed with <> which means value but value
itself is command name.
Also add description for commands to make it clear what it does.

Before
pwm pwm <invert> <pwm_dev_num> <channel> <polarity>
pwm <config> <pwm_dev_num> <channel> <period_ns> <duty_ns>
...

After:
pwm invert <pwm_dev_num> <channel> <polarity> - invert polarity
pwm config <pwm_dev_num> <channel> <period_ns> <duty_ns> - config PWM
pwm enable <pwm_dev_num> <channel> - enable PWM output
pwm disable <pwm_dev_num> <channel> - disable PWM output
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Enable CONFIG_DISPLAY_CPUINFO to display SoC family & revision.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add print_cpuinfo() to print SoC info like family & revision.
This function depends on CONFIG_DISPLAY_CPUINFO config.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

soc_xilinx_versal driver allows identification of family & revision
of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL.
Probe this driver using platdata U_BOOT_DEVICE structure which is
defined at mach-versal/cpu.c.
Add this config to xilinx_versal_virt_defconfig &
xilinx_versal_mini_ospi_defconfig file to select this driver.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

soc_xilinx_zynqmp driver allows identification of family & revision
of zynqmp SoC. This driver is selected by CONFIG_SOC_XILINX_ZYNQMP.
Add this config to xilinx_zynqmp_virt_defconfig file.
Probe this driver using platdata U_BOOT_DEVICE structure which is
specified in mach-zynqmp/cpu.c.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add kernel-doc description for fdt_fixup_memory_banks() because it is
implemented in one specific way and this information should be available
for others to decide if their SoC conforms to it.
If you don't want U-Boot to update your memory DT layout please disable
CONFIG_ARCH_FIXUP_FDT_MEMORY.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Based on DT spec you can have one memory node which multiple ranges or
multiple nodes.
fdt_fixup_memory_banks() is not implemented in a correct way when multiple
memory nodes are present because all ranges are put it to the first memory
node found. And next memory nodes are kept in DT which ends up in the same
range specification in the same DT.

Here is what it is happening.
Origin DT.
memory@0 {
        device_type = "memory";
        reg = <0x0 0x0 0x0 0x80000000>;
};

memory@800000000 {
        device_type = "memory";
        reg = <0x8 0x00000000 0x0 0x80000000>;
};

After fdt_fixup_memory_banks()

memory@0 {
        device_type = "memory";
        reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
};

memory@800000000 {
        device_type = "memory";
        reg = <0x8 0x00000000 0x0 0x80000000>;
};

As is visible memory@0 node got second range but there is still
memory@800000000 node present and 2G range is listed twice.

The solution can't be that second node is removed because it can be
referenced already that's why it is better for us to disable this option
for now.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable cfi flash on zc770-xm012 configuration.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Single configuration is working fine and no issue to enable it.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Replace 'io-standard' property with 'power-source' property in all
zynq dts files to be in sync with Zynq Pinctrl driver.
Signed-off-by: NSai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add missing "jedec, spi-nor" compatible string for QSPI flash node.
Spi-nor framework uses this compatibility string to probe &
initialize flash. With missing compatibility string we are observing
below error:

Zynq> sf probe 0 0 0
 jedec_spi_nor spi_flash@0:0: unrecognized JEDEC id bytes:
00, 00, 00  Failed to initialize SPI flash at 0:0 (error -2)
Signed-off-by: NRaju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Trivial style patch.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Fix header alignment.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

By dt-binding specs led nodes should have -led suffix that's why add it.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Based on thread
https://lists.denx.de/pipermail/u-boot/2021-June/451828.html
especially
"Overall we have a deficiency in the UEFI implementation in that we
cannot deal with block devices added or removed after initialization."
there is a need to deal with removable media as usb/scsi/sata.

That's why bridge this gap in EFI implementation by resetting usb and
scsi resets to get all disks before efi_init_obj_list() is called.

In our standard boot flow, where we use distro boot, order is fixed as
"jtag mmc0 mmc1 qspi0 nand0 usb0 usb1 scsi0 pxe dhcp" with prioritizing
boot device added by commit 2882b39d ("arm64: zynqmp: Setup the first
boot_target at run time").
When device has ESP partition all devices should be detected because then
efi_disk_register() in efi_init_obj_list() is called only once.

The first such a device is sd/emmc(mmc0/mmc1) and then disks on usb/sata
are not handled at all.

The commit 6bb577db ("arm64: zynqmp: Disable
EFI_CAPSULE_ON_DISK_EARLY") also pointed out on this issue but detection of
removable media wasn't solved that's why do it now via preboot command.

I have tested cases without usb and scsi and there is no problem with
calling resets without devices itself.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Do not enable watchdog driver in default zynqmp configuration. The reason
is that not all distributions are handling watchdog properly and then
expires and system resets. If someone needs watchdog in their design please
enable it by hand.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Since set_control_reg is available in sdhci.c, use it and remove
arasan_sdhci_set_control_reg().
Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

As per SD spec when SD host controller is reset, it takes 1000msec
to detect the card state. In case, if we enable the sd bus voltage &
card detect state is not stable, then host controller will disable
the sd bus voltage.

In case of warm/subsystem reboot, due to unstable card detect state
host controller is disabling the sd bus voltage to sd card causing
sd card timeout error. So we wait for a maximum of 1000msec to get
the card detect state stable before we enable the sd bus voltage.

This current fix is workaround for now, this needs to be analysed
further. Zynqmp platform should behave the same as Versal, but we
did not encounter this issue as of now. So we are fixing it for
Versal only.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Move tapdelay function calls to zynq_sdhci.c and make them static
inline. zynqmp_tap_delay.h has function prototypes for the functions
defined in tap_delays.c, which will not be needed anymore.

Remove tap_delays.c and zynqmp_tap_delay.h files.
Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>

Currently xilinx sdhci driver is using zynqmp_mmio_write() to set
tapdelay values and DLL resets. Continue to use this for SPL and mini
U-Boot where U-Boot will be executed at EL3 level.

Use firmware call xilinx_pm_request() using appropriate arguments to
set input/output tapdelays and also for DLL resets in regular flow(EL2).

Host driver should explicitly request DLL reset before ITAP (assert DLL)
and after OTAP (release DLL) to avoid issues in some cases. Also handle
error return where possible.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>

Add enums for pm node id's, pm ioctl id's, tapdelay types, dll reset types
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.
Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Change return type of arasan_sdhci_set_tapdelay() to int, to facilitate
returning errors. Get return values from input and output set clock phase
functions inside arasan_sdhci_set_tapdelay() and return those errors.
Signed-off-by: NT Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: NAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Add firmware based reset controller for Xilinx ZynqMP SoC to let other
drivers to call reset functions. Driver is only tested on Xilinx ZynqMP but
support for Xilinx Versal can be simply added. That's why reset_id and
nr_reset are assigned in probe folder.
Driver is inpired by driver from Linux kernel.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable RTC command to be able to check available.
And also enable ZynqMP RTC driver to be possible to use by default.

Here is the list when both drivers are enabled:
ZynqMP> rtc list
RTC #0 - rtc_emul
RTC #1 - rtc@ffa60000
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>