Add i.MX8MQ SoC Revision
Add is_mx8m helper
The 7ULP is a dummy number, so use 0xEx.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Implement spl_boot_device for i.MX8M.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Update get_reset_cause to reflect i.MX8M
Compile out get_ahb_clk and set_chipselect_size for i.MX8M
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Add USB_BOOT entry.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

Add SiP (Silicon Provider) services function to issue
SMC call to Arm Trusted Firmware.

More SiP information could be found in
  https://github.com/ARM-software/arm-trusted-firmware/blob/master/
  docs/arm-sip-service.rst
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Add clock driver to support i.MX8M.

There are two kind PLLs, FRAC pll and SSCG pll. ROM already
configured SYS PLL1/2, we only need to configure the output.
ocotp/i2c/pll decoding and configuration/usdhc/lcdif/dram pll/
enet clock are configured in the code.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Add pin header file for i.MX8M
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Add register definition header file for i.MX8M
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Add i.MX8M into Kconfig, create a new folder mx8m
dedicated for i.MX8M.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Enable nand on mmc defconfig, so-that preparing nand
for writing/updating bootimage, Linux becomes easy.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

nand device needed for mmc config to access nand
for write and update so enabling SPL_SUPPORT to mmc
or nand is wrt to env device rather nand driver check.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Add i.MX7 PSCI system power off support, linux
kernel can use "poweroff" command to power off
system via SNVS, PMIC power will be disabled.
Signed-off-by: NAnson Huang <Anson.Huang@nxp.com>

Add i.MX7 PSCI system reset support, linux
kernel can use "reboot" command to reset
system even wdog driver is disabled in kernel.
Signed-off-by: NAnson Huang <Anson.Huang@nxp.com>

Use PSCI 1.0 instead of 0.1 to support more power
management feature like system reset, power off etc..
Signed-off-by: NAnson Huang <Anson.Huang@nxp.com>

i.CoreM6 1.5 is an another i.CoreM6 QDL cpu modules which can be connected
to EDIMM starter kit design with eMMC and MIPI-CSI interfaces suitable for
Android and video capture application.

notable features:
CPU			NXP i.MX6 S/DL/D/Q, Up to 4 x Cortex-A9@800MHz
Memory  		Up to 2 GB DDR3-1066
Video Interfaces	Up to 1 Parallel Up to 2 LVDS HDMI 1.4
			port 8 bit CSI INPUT MIPI-CSI INPUT
1 x 10/100 Ethernet interface, 2 x USB, 1 x PCIe, 1 x I2S etc

This patch adds support for Quad/Dual and DualLite/Solo SOM's on
MIPI starter kit with boot from SD and eMMC.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

After moving some USB gadget configs (USB_FUNCTIONS_*) to Kconfig it
turned out that following *_defconfig entries for RockChip are not
needed.
Signed-off-by: NLukasz Majewski <lukma@denx.de>

The CONFIG_USB_FUNCTION_MASS_STORAGE must be selected when one enables
support for ums command.
Signed-off-by: NLukasz Majewski <lukma@denx.de>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>

This commit moves USB_FUNCTION_MASS_STORAGE config to Kconfig.
Signed-off-by: NLukasz Majewski <lukma@denx.de>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>

This commit moves USB_FUNCTION_THOR config to Kconfig.
Signed-off-by: NLukasz Majewski <lukma@denx.de>
Acked-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>

Lets provide alphabetical order for USB_FUNCTION_* entries of
USB_GADGET_DOWNLOAD
Signed-off-by: NLukasz Majewski <lukma@denx.de>

For the redundant environment configuration, env_sf_load still
contained duplicate code instead of using env_import_redund().

Simplify the code by only executing the load twice and delegating
everything else to env_import_redund.
Signed-off-by: NSimon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

For multiple env drivers to correctly implement fallback when
one environment fails to load (e.g. crc error), the return value
of env_import has to be propagated by all env driver's load
function.

Without this change, the first driver that succeeds to load an
environment with an invalid CRC return 0 (success) and no other
drivers are checked.
Signed-off-by: NSimon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

There is more common code in mmc, nand and ubi env drivers that
can be shared by moving to env_import_redund.

For this, a status/error value whether the buffers were loaded
are passed as additional parameters to env_import_redund.
Ideally, these are already returned to the env driver by the
storage driver. This is the case for mmc, nand and ubi, so for
this change, code deduplicated.
Signed-off-by: NSimon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

env_import (and env_import_redund) currently return 1 on success
and 0 on error. However, they are only used from functions
returning 0 on success or a negative value on error.

Let's clean this up by making env_import and env_import_redund
return 0 on success and -EIO on error (as was the case for all
users before).

Users that cared for the return value are also updated. Funny
enough, this only affects onenand.c and sf.c
Signed-off-by: NSimon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

env_get_f calls env_get_char to load single characters from the
environment. However, the return value of env_get_char was not
checked for errors. Now if the env driver does not support the
.get_char call, env_get_f did not notice this and looped over the
whole size of the environment, calling env_get_char over 8000
times with the default settings, just to return an error in the
end.

Fix this by checking if env_get_char returns < 0.
Signed-off-by: NSimon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The omapl138_lcdk platform is not a DA850 SoC so we need to select
SOC_DA8XX and not SOC_DA850, as it was before.  It does however point
out a bit of a misnomer in how all of these PLL defines are named as
they are generic to DA8xx, not DA850 centric.  Remove the 'if SOC_DA850'
under the defaults as these are simply the defaults.  As SOC_DA8XX will
select SYS_DA850_DDR_INIT when needed, we do not need it under both SOC
options.

Fixes: 76e22222 ("Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig")
Signed-off-by: NTom Rini <trini@konsulko.com>

Xilinx changes for v2018.03

- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework based on Zynq concept
- Add low level initialization for zc770 and zcu102
- Add support for Zynq zc770 x16 nand configuration
- Add mini nand/emmc ZynqMP targets
- Some arasan nand changes

This converts the following to Kconfig:
   CONFIG_SYS_OMAP24_I2C_SLAVE
   CONFIG_SYS_OMAP24_I2C_SPEED
Signed-off-by: NAdam Ford <aford173@gmail.com>
Reviewed-by: NPaul Kocialkowski <contact@paulk.fr>

This converts the following to Kconfig:
   CONFIG_SYS_DV_CLKMODE
   CONFIG_SYS_DA850_PLL0_POSTDIV
   CONFIG_SYS_DA850_PLL0_PLLDIV1
   CONFIG_SYS_DA850_PLL0_PLLDIV2
   CONFIG_SYS_DA850_PLL0_PLLDIV3
   CONFIG_SYS_DA850_PLL0_PLLDIV4
   CONFIG_SYS_DA850_PLL0_PLLDIV5
   CONFIG_SYS_DA850_PLL0_PLLDIV6
   CONFIG_SYS_DA850_PLL0_PLLDIV7
   CONFIG_SYS_DA850_PLL1_POSTDIV
   CONFIG_SYS_DA850_PLL1_PLLDIV1
   CONFIG_SYS_DA850_PLL1_PLLDIV2
   CONFIG_SYS_DA850_PLL1_PLLDIV3
Signed-off-by: NAdam Ford <aford173@gmail.com>

This converts the following to Kconfig:
	CONFIG_SYS_BOOT_GET_CMDLINE
	CONFIG_SYS_BOOT_GET_KBD
Signed-off-by: NDerald D. Woods <woods.technical@gmail.com>

Tested with MTA72ASS8G72PSZ-2S6G1. This is 3DS RDIMM module with x4
DDR chips. LS2088ARDB needs to be modified to connect all DQS signals.
Some of them are grounded by default for x8 chips. Tested with RDIMM
MTA18ASF2G72PDZ on main memory controllers. DP-DDR doesn't support
RDIMM. Dropped related timing table.
Signed-off-by: NYork Sun <york.sun@nxp.com>

This adds 2Rx8 RDIMM on LS1046ARDB board. Tested with RDIMM
MTA18ASF2G72PDZ and MTA9ASF1G72PZ.
Signed-off-by: NYork Sun <york.sun@nxp.com>

Variable "row_density" is no longer used. Drop it from DIMM structure.
Signed-off-by: NYork Sun <york.sun@nxp.com>

DDR controllers always use binding register to determine the memory
space to perform data initialization. In case of controller interleaving,
the space is doubled, resulting twice long wait. It wasn't too bad until
the memory capacity increases. To reduce the wait time, reduce the
binding space to half and restore it after data initialization.
Three-way interleaving is no longer used and is removed.
Signed-off-by: NYork Sun <york.sun@nxp.com>

DDR4 RDIMM has some information in SPD to be used to calculate the
control words for register chip. The rest can be found from JEDEC
spec DDR4RCD02.
Signed-off-by: NYork Sun <york.sun@nxp.com>

On top of RDIMM support, add new register calculation to support
3DS RDIMMs. Only symmetrical 3DS is supported at this time.
Signed-off-by: NYork Sun <york.sun@nxp.com>

Wrong field was masked in this workaround due to wrong endianness. The
impacted SoCs have big-endian.
Signed-off-by: NYork Sun <york.sun@nxp.com>

For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.
Signed-off-by: NYork Sun <york.sun@nxp.com>

Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>