1. 06 3月, 2014 2 次提交
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  8. 14 3月, 2013 1 次提交
    • S
      ARM: tegra: enable some CPU errata workarounds · c44bb3a3
      Stephen Warren 提交于
      Tegra20 has a Cortex A9 r1p1, and Tegra30 has a Cortex A9 r2p9. As such,
      some CPU errata exist, and must be worked around.
      
      These must be worked around in the bootloader, since in general, the
      kernel (especially a multi-platform kernel) needs to support being
      launched in non-secure mode (normal world), and hence may not be able
      to write to the CP15 register to enable these workarounds.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      c44bb3a3
  9. 17 1月, 2013 2 次提交