- 07 10月, 2013 1 次提交
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Divided the spi_flash framework into mutiple parts for - spi_flash.c: spi flash core file, interaction for spi/qspi driver to spi_flash framework. - spi_flash_ops.c spi flash preffered operations, erase,write and read. - spi_flash_probe.c spi flash probing, easy to extend probing functionality. This change will support to extend the functionality in a proper manner. Signed-off-by: NJagannadha Sutradharudu Teki <jaganna@xilinx.com>
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- 05 10月, 2013 1 次提交
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- 04 10月, 2013 7 次提交
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由 Andre Przywara 提交于
To enable hypervisors utilizing the ARMv7 virtualization extension on the Versatile Express board with the A15 core tile, we add the required configuration variable. Also we define the board specific smp_set_cpu_boot_addr() function to set the start address for secondary cores in the VExpress specific manner. There is no need to provide a custom smp_waitloop() function here. This also serves as an example for what to do when adding support for new boards. Signed-off-by: NAndre Przywara <andre.przywara@linaro.org>
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由 Andre Przywara 提交于
For the KVM and XEN hypervisors to be usable, we need to enter the kernel in HYP mode. Now that we already are in non-secure state, HYP mode switching is within short reach. While doing the non-secure switch, we have to enable the HVC instruction and setup the HYP mode HVBAR (while still secure). The actual switch is done by dropping back from a HYP mode handler without actually leaving HYP mode, so we introduce a new handler routine in our new secure exception vector table. In the assembly switching routine we save and restore the banked LR and SP registers around the hypercall to do the actual HYP mode switch. The C routine first checks whether we are in HYP mode already and also whether the virtualization extensions are available. It also checks whether the HYP mode switch was finally successful. The bootm command part only calls the new function after the non-secure switch. Signed-off-by: NAndre Przywara <andre.przywara@linaro.org>
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由 Andre Przywara 提交于
Currently the non-secure switch is only done for the boot processor. To enable full SMP support, we have to switch all secondary cores into non-secure state also. So we add an entry point for secondary CPUs coming out of low-power state and make sure we put them into WFI again after having switched to non-secure state. For this we acknowledge and EOI the wake-up IPI, then go into WFI. Once being kicked out of it later, we sanity check that the start address has actually been changed (since another attempt to switch to non-secure would block the core) and jump to the new address. The actual CPU kick is done by sending an inter-processor interrupt via the GIC to all CPU interfaces except the requesting processor. The secondary cores will then setup their respective GIC CPU interface. While this approach is pretty universal across several ARMv7 boards, we make this function weak in case someone needs to tweak this for a specific board. The way of setting the secondary's start address is board specific, but mostly different only in the actual SMP pen address, so we also provide a weak default implementation and just depend on the proper address to be set in the config file. Signed-off-by: NAndre Przywara <andre.przywara@linaro.org>
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由 Andre Przywara 提交于
To actually trigger the non-secure switch we just implemented, call the switching routine from within the bootm command implementation. This way we automatically enable this feature without further user intervention. Signed-off-by: NAndre Przywara <andre.przywara@linaro.org>
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由 Andre Przywara 提交于
The core specific part of the work is done in the assembly routine in nonsec_virt.S, introduced with the previous patch, but for the full glory we need to setup the GIC distributor interface once for the whole system, which is done in C here. The routine is placed in arch/arm/cpu/armv7 to allow easy access from other ARMv7 boards. We check the availability of the security extensions first. Since we need a safe way to access the GIC, we use the PERIPHBASE registers on Cortex-A15 and A7 CPUs and do some sanity checks. Boards not implementing the CBAR can override this value via a configuration file variable. Then we actually do the GIC enablement: a) enable the GIC distributor, both for non-secure and secure state (GICD_CTLR[1:0] = 11b) b) allow all interrupts to be handled from non-secure state (GICD_IGROUPRn = 0xFFFFFFFF) The core specific GIC setup is then done in the assembly routine. Signed-off-by: NAndre Przywara <andre.przywara@linaro.org>
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由 Andre Przywara 提交于
While actually switching to non-secure state is one thing, another part of this process is to make sure that we still have full access to the interrupt controller (GIC). The GIC is fully aware of secure vs. non-secure state, some registers are banked, others may be configured to be accessible from secure state only. To be as generic as possible, we get the GIC memory mapped address based on the PERIPHBASE value in the CBAR register. Since this register is not architecturally defined, we check the MIDR before to be from an A15 or A7. For CPUs not having the CBAR or boards with wrong information herein we allow providing the base address as a configuration variable. Now that we know the GIC address, we: a) allow private interrupts to be delivered to the core (GICD_IGROUPR0 = 0xFFFFFFFF) b) enable the CPU interface (GICC_CTLR[0] = 1) c) set the priority filter to allow non-secure interrupts (GICC_PMR = 0xFF) Also we allow access to all coprocessor interfaces from non-secure state by writing the appropriate bits in the NSACR register. The generic timer base frequency register is only accessible from secure state, so we have to program it now. Actually this should be done from primary firmware before, but some boards seems to omit this, so if needed we do this here with a board specific value. The Versatile Express board does not need this, so we remove the frequency from the configuration file here. After having switched to non-secure state, we also enable the non-secure GIC CPU interface, since this register is banked. Since we need to call this routine also directly from the smp_pen later (where we don't have any stack), we can only use caller saved registers r0-r3 and r12 to not mess with the compiler. Signed-off-by: NAndre Przywara <andre.przywara@linaro.org>
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由 Andre Przywara 提交于
A prerequisite for using virtualization is to be in HYP mode, which requires the CPU to be in non-secure state first. Add a new file in arch/arm/cpu/armv7 to hold a monitor handler routine which switches the CPU to non-secure state by setting the NS and associated bits. According to the ARM architecture reference manual this should not be done in SVC mode, so we have to setup a SMC handler for this. We create a new vector table to avoid interference with other boards. The MVBAR register will be programmed later just before the smc call. Signed-off-by: NAndre Przywara <andre.przywara@linaro.org>
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- 03 10月, 2013 2 次提交
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由 Andre Przywara 提交于
armv7.h contains some useful constants, but also C prototypes. To include it also in assembly files, protect the non-assembly part appropriately. Signed-off-by: NAndre Przywara <andre.przywara@linaro.org>
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@ti.com>
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- 02 10月, 2013 6 次提交
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由 Albert ARIBAUD 提交于
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由 Albert ARIBAUD 提交于
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由 Simon Glass 提交于
There are a few make options such as BUILD_TAG which can be provided when building U-Boot. Provide a way for buildman to pass these flags to make also. The flags should be in a [make-flags] section and arranged by target name (the 'target' column in boards.cfg. See the README for more details. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Commit 27af930e changed the boards.cfg format but missed to change the parsing in buildman. A follow-on commit 03c1bb24 fixed this but missed fixing the tests. This patch updates the tests to fit the new Board constructor. ./tools/buildman/buildman -t <unittest.result.TestResult run=1 errors=0 failures=0> Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 27 9月, 2013 7 次提交
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由 Julius Werner 提交于
The EHCI controller has some very specific requirements for the USB 2.0 port test modes, which were not closely followed in the initial test mode commit. It demands that the host controller is completely shut down (all ports suspended, Run/Stop bit unset) when activating test mode, and will not work on an already enumerated port. This patch fixes that by introducing a new ehci_shutdown() function that closely follows the procedure listed in EHCI 4.14. Also, when we have such a function anyway, we might as well also use it in usb_lowlevel_stop() to make the normal host controller shutdown cleaner. Signed-off-by: NJulius Werner <jwerner@chromium.org> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Eric Nelson 提交于
This patch adds the pad to i.MX6DQ and changes the i.MX6DLS declaration to match the Linux kernel declaration. Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Pierre Aubert 提交于
The value MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET that was used to initialize the CCGR3 register caused an undefined value for CG0. Signed-off-by: NPierre Aubert <p.aubert@staubli.com> CC: Stefano Babic <sbabic@denx.de> Acked-by: NEric Nelson <eric.nelson@boundarydevices.com>
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由 Fabio Estevam 提交于
If smc911x_initialize() fails we should return the error immediately. While at it, also check the error from cpu_eth_init(). Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Fabio Estevam 提交于
If cpu_eth_init() fails we should return the error immediately. Cc: Marek Vasut <marex@denx.de> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Fabio Estevam 提交于
If cpu_eth_init() fails we should return the error immediately. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 York Sun 提交于
Convert set_hdr_func(struct imx_header *imxhdr) to set_hdr_func(void) to get rid of the warning warning: ‘imxhdr’ is used uninitialized in this function Signed-off-by: NYork Sun <yorksun@freescale.com> Acked-by: NStefano Babic <sbabic@denx.de>
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- 24 9月, 2013 16 次提交
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由 Bo Shen 提交于
When unbind the gadget driver, need call disconnect first. Signed-off-by: NBo Shen <voice.shen@atmel.com>
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由 Lukasz Majewski 提交于
The download gadget code and DFU function lacks of proper declarations for the case when a target board wants to use only one of available usb functions. Moreover the relevant declarations have been moved to consistent localization (like <dfu.h>). Signed-off-by: NLukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
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由 Lukasz Majewski 提交于
Only the <linux/usb/gadget.h> requires error.h include. Hence, several includes of error.h at USB gadget functions are not needed. Moreover unnecessary malloc.h includes were also removed. Signed-off-by: NLukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
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由 Lukasz Majewski 提交于
The mass storage composite function is now compiled in only when CONFIG_USB_GADGET_MASS_STORAGE is defined. Such change provides binary size reduction for boards which use USB download gadget (like am335x_evm) with DFU, but don't use UMS. For example at am335x_evm board reduction is more than 2KiB for text and around 120B for data. Signed-off-by: NLukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
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由 Afzal Mohammed 提交于
Enable DFU for RAM, provide example dfu_alt_info Signed-off-by: NAfzal Mohammed <afzal.mohd.ma@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: NLukasz Majewski <l.majewski@samsung.com>
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由 Afzal Mohammed 提交于
DFU spec mentions it as a method to upgrade firmware (software stored in writable non-volatile memory). It also says other potential uses of DFU is beyond scope of the spec. Here such a beyond the scope use is being attempted - directly pumping binary images from host via USB to RAM. This facility is a developer centric one in that it gives advantage over upgrading non-volatile memory for testing new images every time during development and/or testing. Directly putting image onto RAM would speed up upgrade process. This and convenience was the initial thoughts that led to doing this, speed improvement over MMC was only 1 second though - 6 sec on RAM as opposed to 7 sec on MMC in beagle bone, perhaps enabling cache and/or optimizing DFU framework to avoid multiple copy for ram (if worth) may help, and on other platforms and other boot media like NAND maybe improvement would be higher. And for a platform that doesn't yet have proper DFU suppport for non-volatile media's, DFU to RAM can be used. Another minor advantage would be to increase life of mmc/nand as it would be less used during development/testing. usage: <image name> ram <start address> <size> eg. kernel ram 0x81000000 0x1000000 Downloading images to RAM using DFU is not something new, this is acheived in openmoko also. DFU on RAM can be used for extracting RAM contents to host using dfu upload. Perhaps this can be extended to io for squeezing out register dump through usb, if it is worth. Signed-off-by: NAfzal Mohammed <afzal.mohd.ma@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Gerhard Sittig <gsi@denx.de> Acked-by: NMarek Vasut <marex@denx.de> Acked-by: NLukasz Majewski <l.majewski@samsung.com> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Afzal Mohammed 提交于
MMC and NAND independently defines same enumerators for read/write. Unify them by defining enum in dfu header. RAM support that is being added newly also can make use of it. Signed-off-by: NAfzal Mohammed <afzal.mohd.ma@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Acked-by: NLukasz Majewski <l.majewski@samsung.com> Acked-by: NMarek Vasut <marex@denx.de> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Lukasz Majewski 提交于
New dfu_init_env_entities() function has been extracted from cmd_dfu.c and stored at dfu core. This is a dfu centric code, so it shall be processed in the core. Change-Id: I756c5de922fa31399d8804eaadc004ee98844ec2 Signed-off-by: NLukasz Majewski <l.majewski@samsung.com> Tested-by: NHeiko Schocher <hs@denx.de>
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由 Bo Shen 提交于
Add RNDIS gadget support to test atmel usba udc driver Signed-off-by: NBo Shen <voice.shen@atmel.com>
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由 Bo Shen 提交于
Correct the UDPHS name from UDHPS Signed-off-by: NBo Shen <voice.shen@atmel.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Bo Shen 提交于
Add atmel usba udc driver support, porting from Linux kernel The original code in Linux Kernel information is as following commit e01ee9f509a927158f670408b41127d4166db1c7 Author: Jingoo Han <jg1.han@samsung.com> Date: Tue Jul 30 17:00:51 2013 +0900 usb: gadget: use dev_get_platdata() Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: NBo Shen <voice.shen@atmel.com>
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由 Troy Kisky 提交于
As seen with codesourcery compiler 2010q1, the buf pointer in usb_request structure is not aligned on 4 bytes boundary causing data aborts in eth_setup -> conf_buf -> usb_gadget_config_buf. Make it as align access to fix this issue. Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com> [voice.shen@atmel.com: add commit message] Signed-off-by: NBo Shen <voice.shen@atmel.com>
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由 Lukasz Majewski 提交于
Up till now the DFU maximum file size (to be written to e.g. eMMC) was different from the DFU data buffer size. It caused errors when one buffer was smaller than data to be written. Now, the maximum DFU file size is equal to default DFU buffer size. In spite of this, user is still able to manually adjust those default values. Change-Id: Ied75d0f7b59588ebd79dae9a22af801d36622216 Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
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由 Lukasz Majewski 提交于
Correct error message if overflow is detected. Change-Id: I8a915c7353d49822c046fbc36241237b370e6c98 Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
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由 Joel Fernandes 提交于
As seen on GCC 4.6 Linaro compiler, control_req buffer is not aligned on 4 byte boundaray causing data aborts in eth_setup -> conf_buf during dhcp boot over usb_ether. Fix the issue my aligning control_req buffer using DEFINE_CACHE_ALIGN_BUFFER. Tested on am335x_evm platform (beaglebone). Applies on 2013.10-rc1 branch. Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Signed-off-by: NJoel Fernandes <joelf@ti.com>
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由 Dani Krishna Mohan 提交于
This patch modifies the MAX98095 audio codec to support I2S0 channel in codec slave mode. Signed-off-by: NDani Krishna Mohan <krishna.md@samsung.com>
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