1. 28 1月, 2017 7 次提交
  2. 27 1月, 2017 1 次提交
  3. 26 1月, 2017 12 次提交
  4. 25 1月, 2017 13 次提交
    • K
      arm64: mvebu: Update bubt command MMC block device access · e559ef1a
      Konstantin Porotchkin 提交于
      Update the MMC block device access code in bubt command
      implementation according to the latest MMC driver changes.
      
      Change-Id: Ie852ceefa0b040ffe1362bdb7815fcea9b2d923b
      Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com>
      Cc: Stefan Roese <sr@denx.de>
      Cc: Nadav Haklai <nadavh@marvell.com>
      Cc: Neta Zur Hershkovits <neta@marvell.com>
      Cc: Omri Itach <omrii@marvell.com>
      Cc: Igal Liberman <igall@marvell.com>
      Cc: Haim Boot <hayim@marvell.com>
      Cc: Hanna Hawa <hannah@marvell.com>
      e559ef1a
    • S
      arm64: mvebu: Enable SDHCI/MMC support for the db-88f7040/8040 · 274d3562
      Stefan Roese 提交于
      This patch enables the MMC support for the SDHCI controller on the
      Armada 7k db-88f7040 and the Armada 8k db-88f8040 board.
      Signed-off-by: NStefan Roese <sr@denx.de>
      Cc: Nadav Haklai <nadavh@marvell.com>
      Cc: Kostya Porotchkin <kostap@marvell.com>
      Cc: Wilson Ding <dingwei@marvell.com>
      Cc: Victor Gu <xigu@marvell.com>
      Cc: Hua Jing <jinghua@marvell.com>
      Cc: Terry Zhou <bjzhou@marvell.com>
      Cc: Hanna Hawa <hannah@marvell.com>
      Cc: Haim Boot <hayim@marvell.com>
      274d3562
    • S
      arm64: mvebu: Armada 7040-db: Add SDHCI device tree nodes · 27090324
      Stefan Roese 提交于
      This patch adds the SDHCI device tree nodes to the Armada 7040-db
      dts file.
      Signed-off-by: NStefan Roese <sr@denx.de>
      Cc: Nadav Haklai <nadavh@marvell.com>
      Cc: Kostya Porotchkin <kostap@marvell.com>
      Cc: Wilson Ding <dingwei@marvell.com>
      Cc: Victor Gu <xigu@marvell.com>
      Cc: Hua Jing <jinghua@marvell.com>
      Cc: Terry Zhou <bjzhou@marvell.com>
      Cc: Hanna Hawa <hannah@marvell.com>
      Cc: Haim Boot <hayim@marvell.com>
      27090324
    • S
      arm64: mvebu: Armada 7k/8k: Add SDHCI device tree nodes · b14b0b1e
      Stefan Roese 提交于
      This patch adds the SDHCI device tree nodes to the Armada AP806 dtsi
      file which is used by the Armada 7k/8K SoCs.
      Signed-off-by: NStefan Roese <sr@denx.de>
      Cc: Nadav Haklai <nadavh@marvell.com>
      Cc: Kostya Porotchkin <kostap@marvell.com>
      Cc: Wilson Ding <dingwei@marvell.com>
      Cc: Victor Gu <xigu@marvell.com>
      Cc: Hua Jing <jinghua@marvell.com>
      Cc: Terry Zhou <bjzhou@marvell.com>
      Cc: Hanna Hawa <hannah@marvell.com>
      Cc: Haim Boot <hayim@marvell.com>
      b14b0b1e
    • S
      arm64: mvebu: Enable SDHCI/MMC support for the db-88f3720 · ff11d622
      Stefan Roese 提交于
      This patch enables the MMC support for the SDHCI controller on the
      Armada 3700 db-88f3720 board.
      Signed-off-by: NStefan Roese <sr@denx.de>
      Cc: Nadav Haklai <nadavh@marvell.com>
      Cc: Kostya Porotchkin <kostap@marvell.com>
      Cc: Wilson Ding <dingwei@marvell.com>
      Cc: Victor Gu <xigu@marvell.com>
      Cc: Hua Jing <jinghua@marvell.com>
      Cc: Terry Zhou <bjzhou@marvell.com>
      Cc: Hanna Hawa <hannah@marvell.com>
      Cc: Haim Boot <hayim@marvell.com>
      ff11d622
    • S
      arm64: mvebu: Armada 3720-db: Add SDHCI device tree nodes · 22074fc5
      Stefan Roese 提交于
      This patch adds the SDHCI device tree nodes to the Armada 3700-db
      dts file.
      Signed-off-by: NStefan Roese <sr@denx.de>
      Cc: Nadav Haklai <nadavh@marvell.com>
      Cc: Kostya Porotchkin <kostap@marvell.com>
      Cc: Wilson Ding <dingwei@marvell.com>
      Cc: Victor Gu <xigu@marvell.com>
      Cc: Hua Jing <jinghua@marvell.com>
      Cc: Terry Zhou <bjzhou@marvell.com>
      Cc: Hanna Hawa <hannah@marvell.com>
      Cc: Haim Boot <hayim@marvell.com>
      22074fc5
    • S
      arm64: mvebu: Armada 3700: Add SDHCI device tree nodes · cbe0ece8
      Stefan Roese 提交于
      This patch adds the SDHCI device tree nodes to the Armada 3700 dtsi
      file.
      Signed-off-by: NStefan Roese <sr@denx.de>
      Cc: Nadav Haklai <nadavh@marvell.com>
      Cc: Kostya Porotchkin <kostap@marvell.com>
      Cc: Wilson Ding <dingwei@marvell.com>
      Cc: Victor Gu <xigu@marvell.com>
      Cc: Hua Jing <jinghua@marvell.com>
      Cc: Terry Zhou <bjzhou@marvell.com>
      Cc: Hanna Hawa <hannah@marvell.com>
      Cc: Haim Boot <hayim@marvell.com>
      cbe0ece8
    • S
      mmc: Add Marvell Xenon SDHCI controller driver · b6acb5f1
      Stefan Roese 提交于
      This driver implementes platform specific code for the Xenon SDHCI
      controller which is integrated in the Marvell MVEBU Armada 37xx and
      Armada 7k / 8K SoCs.
      
      History:
      This driver is ported from the Marvell U-Boot version 2015.01 which is
      written by Victor Gu <xigu@marvell.com> with minor changes ported from
      the Linux driver which is written by Ziji Hu <huziji@marvell.com>.
      Signed-off-by: NStefan Roese <sr@denx.de>
      Cc: Jaehoon Chung <jh80.chung@samsung.com>
      Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
      Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
      b6acb5f1
    • S
      mmc: sdhci: Add support for optional controller specific set_ios_post() · 210841c6
      Stefan Roese 提交于
      Some SDHCI drivers might need to do some special controller configuration
      after the common clock set_ios() function has been called (speed / width
      configuration). This patch adds a call to the newly created function
      set_ios_port() when its configured in the host driver.
      
      This will be used by the Xenon SDHCI controller driver used on the
      Marvell Armada 3700 and 7k/8k ARM64 SoCs.
      Signed-off-by: NStefan Roese <sr@denx.de>
      Cc: Jaehoon Chung <jh80.chung@samsung.com>
      Cc: Simon Glass <sjg@chromium.org>
      Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
      210841c6
    • S
      mmc: sdhci: Clear SDHCI_CLOCK_CONTROL before configuring the new value · 899fb9e3
      Stefan Roese 提交于
      This patch completely clears the SDHCI_CLOCK_CONTROL register before the
      new value is configured instead of just clearing the 2 bits
      SDHCI_CLOCK_CARD_EN and SDHCI_CLOCK_INT_EN. Without this change, some
      clock configurations will lead to the "Internal clock never stabilised."
      error message on the Xenon SDHCI controller used on the Marvell Armada
      3700 and 7k/8k ARM64 SoCs.
      
      The Linux SDHCI core driver also writes 0 to this register before
      the new value is configured. So this patch simplifies the driver a bit
      and brings the U-Boot driver more in-line with the Linux one.
      Signed-off-by: NStefan Roese <sr@denx.de>
      Cc: Jaehoon Chung <jh80.chung@samsung.com>
      Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
      Cc: Michal Simek <michal.simek@xilinx.com>
      Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
      899fb9e3
    • T
      powerpc: Enable flush and invalidate dcache by range for MPC85xx · 76866600
      Tony O'Brien 提交于
      Commit ac337168 unified functions to flush and invalidate dcache by
      range. These two functions were no-ops for SoCs other than 4xx and
      MPC86xx. Adding these functions seemed to be correct but introduced
      issues in some drivers when the dcache was flushed. While the root
      cause was under investigation, these functions were disabled in
      Commit cb1629f9 for affected SoCs, including the MPC85xx, to make
      the various drivers work.
      
      On the T208x USB stopped working after v2016.07 was pulled.  After
      re-enabling the dcache functions for the MPC85xx it started working
      again.  The USB and DPPA Ethernet drivers have been seen as
      operational after this change but other drivers cannot be tested.
      Reviewed-by: NChris Packham <chris.packham@alliedtelesis.co.nz>
      Signed-off-by: NTony O'Brien <tony.obrien@alliedtelesis.co.nz>
      Cc: Marek Vasut <marex@denx.de>
      Cc: York Sun <york.sun@nxp.com>
      Reviewed-by: York Sun <york.sun>
      76866600
    • T
      mpc85xx: pcie: Implement workaround for Erratum A007815 · 09bfd962
      Tony O'Brien 提交于
      The read-only-write-enable bit is set by default and must be cleared
      to prevent overwriting read-only registers.  This should be done
      immediately after resetting the PCI Express controller.
      Reviewed-by: NHamish Martin <hamish.martin@alliedtelesis.co.nz>
      Signed-off-by: NTony O'Brien <tony.obrien@alliedtelesis.co.nz>
      [York S: Move SYS_FSL_ERRATUM_A007815 to Kconfig]
      Reviewed-by: NYork Sun <york.sun@nxp.com>
      09bfd962
    • D
      powerpc: mpc85xx: Implemente workaround for CPU erratum A-007907 · 06ad970b
      Darwin Dingel 提交于
      Core hang occurs when using L1 stashes. Workaround is to disable L1
      stashes so software uses L2 cache for stashes instead.
      Reviewed-by: NChris Packham <chris.packham@alliedtelesis.co.nz>
      Signed-off-by: NDarwin Dingel <darwin.dingel@alliedtelesis.co.nz>
      Cc: York Sun <york.sun@nxp.com>
      [York S: Move SYS_FSL_ERRATUM_A007907 to Kconfig]
      Reviewed-by: NYork Sun <york.sun@nxp.com>
      06ad970b
  5. 24 1月, 2017 7 次提交