- 02 7月, 2016 2 次提交
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由 Andreas Dannenberg 提交于
Align the name of the defconfig file for high-security (HS) device variants from the AM43xx family of SoCs with the corresponding name used for the general purpose devices. This allows for easier cross-association of those files and also provides room to grow from an HS device part number perspective. Furthermore, update and cleanup associated MAINTAINERS file. Signed-off-by: NAndreas Dannenberg <dannenberg@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Madan Srinivas <madans@ti.com>
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由 Praneeth Bajjuri 提交于
Correcting QSPI disable/unselect CS reset value. CTRL_CORE_CONTROL_IO_2: QSPI_MEMMAPPED_CS[10:8] This is not causing any issue, but its better to untouch the reserved bits. Praneeth Bajjuri <praneeth@ti.com> Signed-off-by: NRavi Babu <ravibabu@ti.com>
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- 29 6月, 2016 10 次提交
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由 Bin Meng 提交于
There is a dummy pch driver in the coreboot directory. This causes drivers of its children fail to function due to empty ops. Remove the whole file since it is no longer needed. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Abhimanyu Saini 提交于
Currently layescape SoCs are not using cpu nodes. So removing them in favour of compatibly with similar SoCs that have different cores like LS2080A and LS2088A. This has been tested on LS2080AQDS, LS1043ARDB, LS1012ARDB. Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: NAbhimanyu Saini <abhimanyu.saini@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Prabhakar Kushwaha 提交于
Freescale ARMv8 SoC name ends with "A" to represent ARM SoCs. like LS2080A, LS1043A, LS1012A. So append "A" to SoC names. Signed-off-by: NPratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Peng Fan 提交于
Introudce wp_enable. To check WPSPL, wp_enable needs to be set to 1 in board code. Take i.MX6UL for example, for some boards, they do not use WP singal, so they does not configure USDHC1_WP_SELECT_INPUT, and its default value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and SION bit set. So USDHC controller can always get wp signal and WPSPL shows write protect and blocks driver continuing. This is not what we want to see, so add wp_enable, and if set to 0, just omit the WPSPL checking and this does not effect normal working of usdhc controller. If wp-gpios is provided in dts, wp_enable is set to 1, otherwise 0. Signed-off-by: NPeng Fan <van.freenix@gmail.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: York Sun <york.sun@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: NFabio Estevam <fabio.estevam@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Ye Li 提交于
The USDHC moves the 4 clock bits CARD_CLK_SOFT_EN, IPG_PERCLK_SOFT_EN, HCLK_SOFT_EN, and IPG_CLK_SOFT_EN from sysctl register to vendorspec register. The driver uses RSTA to replace the clock gate off operation. But this is not a good solution because: 1. when using RSTA, we should wait this bit to clear by itself. This is not implemeneted in the code. 2. After RSTA is set, it is recommended that the Host Driver reset the external card and reinitialize it. So in this patch, we change to use the vendorspec registers for these bits operation. Signed-off-by: NYe Li <ye.li@nxp.com> Signed-off-by: NPeng Fan <van.freenix@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: NFabio Estevam <fabio.estevam@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Peng Fan 提交于
When booting in eMMC fast boot, MMC host does not exit from boot mode after bootrom loading image. So the first command 'CMD0' sent in uboot will pull down the CMD line to low and cause errors. This patch cleans the MMC boot register in "mmc_init" to put the MMC host back to normal mode. Also clear DLL_CTRL delay line settings at USDHC initialization to eliminate the pre-settings from boot rom. Signed-off-by: NPeng Fan <van.freenix@gmail.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: York Sun <york.sun@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: NFabio Estevam <fabio.estevam@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Qianyu Gong 提交于
Now I2C is initialized early enough to access FPGA so it supports to show board info as early as other boot methods. Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Qianyu Gong 提交于
Get the clocks from FPGA through I2C, if IFC is disabled. Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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- 28 6月, 2016 8 次提交
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由 Peng Fan 提交于
Add CONFIG_{SD|NAND|ONENAND|SPI|QSPI|SATA}_BOOT kconfig entries. SoCs supports loading U-Boot from different medias to DRAM, such as i.MX6/7 supports loading U-Boot to DRAM from sd/emmc/nand/qspi/spi/sata and etc. For i.MX, imximage will generate different IVT headers according to boot medias. Signed-off-by: NPeng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Francois Retief <fgretief@spaceteq.co.za> Cc: Tom Rini <trini@konsulko.com>
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由 Peng Fan 提交于
Not only am335x supports booting from NOR, i.MX6 SoCs also supports booting from NOR. Make NOR_BOOT a common option to let different SoCs share it. Signed-off-by: NPeng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Francois Retief <fgretief@spaceteq.co.za> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Steve Rae 提交于
Update the email address for the boards that I maintain. Signed-off-by: NSteve Rae <steve.rae@raedomain.com>
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由 Steve Rae 提交于
- increase the size of the fill buffer - testing has shown a 10x improvement when the sparse image has large CHUNK_TYPE_FILL chunks Signed-off-by: NSteve Rae <srae@broadcom.com>
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由 Steve Rae 提交于
In order to process the CHUNK_TYPE_DONT_CARE properly, there is a requirement to be able to 'reserve' a specified number of blocks in the storage media. Because of the special handling of "bad blocks" in NAND devices, this is implemented in a storage abstraction function. Signed-off-by: NSteve Rae <srae@broadcom.com> Reviewed-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Steve Rae 提交于
- update fastboot_okay() and fastboot_fail() This file originally came from upstream code. While retaining the storage abstraction feature, this is the second set of the changes required to resync with the cmd_flash_mmc_sparse_img() in the file aboot.c from https://us.codeaurora.org/cgit/quic/la/kernel/lk/plain/app/aboot/aboot.c?h=LE.BR.1.2.1Signed-off-by: NSteve Rae <srae@broadcom.com>
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由 Steve Rae 提交于
This file originally came from upstream code. While retaining the storage abstraction feature, this is the first set of the changes required to resync with the cmd_flash_mmc_sparse_img() in the file aboot.c from https://us.codeaurora.org/cgit/quic/la/kernel/lk/plain/app/aboot/aboot.c?h=LE.BR.1.2.1Signed-off-by: NSteve Rae <srae@broadcom.com>
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由 Steve Rae 提交于
This "session-id" alogrithm is not required, and currently corrupts the stored image whenever more the one "session" is required. Signed-off-by: NSteve Rae <srae@broadcom.com>
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- 27 6月, 2016 9 次提交
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由 Jaehoon Chung 提交于
These condition checking are wrong. Original Author's intention might be "&" instead of "&&". It can know whether receive or transmit data request with BIT[4]/BIT[5] of RINTSTS register. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Heiko Schocher 提交于
add DM and DTS support for the at91 based siemens boards. Signed-off-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org> [rebased on current ToT] Signed-off-by: NAndreas Bießmann <andreas@biessmann.org>
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由 Heiko Schocher 提交于
Signed-off-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org> [rebased on current ToT] Signed-off-by: NAndreas Bießmann <andreas@biessmann.org>
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由 Heiko Schocher 提交于
Add this files from Linux v4.6-rc5 66b8a424d: [workqueue: fix ghost PENDING flag while doing MQ IO] Signed-off-by: NHeiko Schocher <hs@denx.de> Acked-by: NAndreas Bießmann <andreas@biessmann.org>
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由 Heiko Schocher 提交于
Signed-off-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org> [rebase on current ToT, don't delete gurnard DTB creation] Signed-off-by: NAndreas Bießmann <andreas@biessmann.org>
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由 Heiko Schocher 提交于
add support for CONFIG_AT91SAM9M10G45. Signed-off-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>
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由 Marek Vasut 提交于
Since the spl_boot_mode() is now passed the boot device to boot from, make use of it instead of inquiring for the boot device again. This allows board_boot_order() to function correctly. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>
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由 Marek Vasut 提交于
The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: NAndreas Bießmann <andreas@biessmann.org>
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- 25 6月, 2016 11 次提交
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由 Masahiro Yamada 提交于
If the final targets depend on both "dtbs" and "dts/dt.dtb", and -j option is given to the command line, multiple threads descend into the dts/ directory, which causes build error. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Tested-by: NAndreas Dannenberg <dannenberg@ti.com>
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由 Alexander Graf 提交于
The distro script is supposed to use the internal fdt as fallback if we find no viable other option. However, we're missing a space key to actually make that work. Add the space, so we can successfully load an EFI blob even when there is no device tree provided on the target device. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Hannes Schmelzer 提交于
Rename B&R kwb board to brxre1 Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Hannes Schmelzer 提交于
Rename B&R tseries board to brppt1 Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Steve Rae 提交于
The handling of the "usage counter" is incorrect, and the clock should only be disabled when transitioning from 1 to 0. Reported-by: NChris Brand <chris.brand@broadcom.com> Signed-off-by: NSteve Rae <srae@broadcom.com>
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由 Chris Brand 提交于
The Kona Peripheral Slave CCU has 4 policy mask registers, not 8. Signed-off-by: NChris Brand <chris.brand@broadcom.com> Signed-off-by: NSteve Rae <srae@broadcom.com>
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由 Steve Rae 提交于
Choose the Kconfig boot0 hook option and implement the required code. Signed-off-by: NSteve Rae <srae@broadcom.com>
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由 Steve Rae 提交于
The Kona PHY supports an 8-bit wide UTMI interface, therefore, choose this Kconfig setting. Signed-off-by: NSteve Rae <srae@broadcom.com>
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由 Stephen Warren 提交于
clk->id is unsigned, so it can't be < 0. Remove the check for that. FWIW, this issue was introduced when the clock API converted e.g. clk_get_rate()'s clock ID parameter from an int to an unsigned long (with a struct clk), without removing this check. Fixes: 135aa950 ("clk: convert API to match reset/mailbox style") Reported-by: Coverity Scan Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Andrej Rosano 提交于
Signed-off-by: NAndrej Rosano <andrej@inversepath.com>
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由 Masahiro Yamada 提交于
Use Kbuild standard style where possible. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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