Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

General code cleanup to use in/out IO accessors as well as making
the code that prints out info sane between board and generic fsl pci
code.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

For some reason the CLKDIV field varies between SoC in how it interprets
the bit values.

All 83xx and early (e500v1) PQ3 devices support:
 clk/2: CLKDIV = 2
 clk/4: CLKDIV = 4
 clk/8: CLKDIV = 8

Newer PQ3 (e500v2) and MPC86xx support:
 clk/4: CLKDIV = 2
 clk/8: CLKDIV = 4
 clk/16: CLKDIV = 8

Ensure that the MPC86xx and MPC85xx still get the same behavior and make
the defines reflect their logical view (not the value of the field).
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NPeter Tyser <ptyser@xes-inc.com>

This patch adds support for resolving symlinks to directories as well as
relative symlinks. Symlinks are now always resolved during file lookup,
so the load stage no longer needs to special-case them.
Signed-off-by: NSimon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: NStefan Roese <sr@denx.de>

u-boot reports a PCIE PLL lock error at boot time on Yucca board, and
left PCIe nonfunctional. This is fixed by making u-boot function
ppc4xx_init_pcie() to wait 300 uS after negating reset before the
first check of the PLL lock.
Signed-off-by: NRupjyoti Sarmah <rsarmah@amcc.com>
Signed-off-by: NStefan Roese <sr@denx.de>

DDR2 timing for intip was on the edge for some of the available chips
for this board. Now it is verfied to work with all of them.
Signed-off-by: NDirk Eibach <eibach@gdsys.de>
Signed-off-by: NStefan Roese <sr@denx.de>

Fix warning: ide.c:60: warning: dereferencing type-punned pointer will
break strict-aliasing rules
Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Guennadi Liakhovetski <lg@denx.de>

Remove board-specific #ifdefs for calling phy_reset() during
initializtion
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

Remove board-specific #ifdefs for calling misc_init_r() during
initializtion
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Acked-by: NHeiko Schocher <hs@denx.de>

The more standard 'source' command provides identical functionality to
the autoscr command.

Environment variable names/values on the MVBC_P, MVBML7, kmeter1,
mgcoge, and km8xx boards are updated to no longer refernce 'autoscr'.

The 'autoscript' and 'autoscript_uname' environment variables are
also removed.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Acked-by: NAndre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: NHeiko Schocher <hs@denx.de>

Micron nand flash needs a reset before a read command is issued.
The current mpc5121_nfc driver ignores the reset command.

Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@noser.com>
Acked-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: NHeiko Schocher <hs@denx.de>

Fix warning: flash.c:531: warning: dereferencing type-punned pointer
will break strict-aliasing rules
Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Kri Davsson <kd@flaga.is>

Commits

  02f99901
  52d61227

introduced a regression where platform-specific ffs/fls implementations
were defined away. This patch corrects that by using PLATFORM_xxx
instead of the name itself.
Signed-off-by: NSimon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NStefan Roese <sr@denx.de>

All 4xx variants had their own, mostly identical get_OPB_freq()
function. Some variants even only had the OPB frequency calculated
in this routine and not supplied the sys_info.freqOPB variable
correctly (e.g. 405EZ). This resulted in incorrect OPB values passed
via the FDT to Linux.

This patch now removes all those copies and only uses one function
for all 4xx variants (except for IOP480 which doesn't have an OPB).
Signed-off-by: NStefan Roese <sr@denx.de>

Acadia still used the "old" arch/ppc bootm commands for booting
Linux images without FDT. This patch now enables these fdt-aware
boot commands for Acadia as well.
Signed-off-by: NStefan Roese <sr@denx.de>

With this fix, Linux correctly configures the baudrate when booting
with FDT passed from U-Boot to Linux.
Signed-off-by: NStefan Roese <sr@denx.de>

We should make sure to clear MSR[ME, CE, DE] when we boot an OS image
since we have changed the exception vectors and the OSes vectors might
not be setup we should avoid async interrupts at all costs.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

By pulling out cpu_init_early we can build just it and not all of
cpu_init for NAND_SPL.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Use write_tlb and don't use memset so we can use the same code for
cpu_init_early_f between NAND SPL and not.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

So that we can set the NAND loader's relocate stack pointer
to the value other than the relocate address + 0x10000.
Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com>
Acked-by: NKim Phillips <kim.phillips@freescale.com>
Acked-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The MPC8536E is capable of booting form NAND/eSDHC/eSPI, this patch
implements these three bootup methods in a unified way - all of these
use the general cpu/mpc85xx/start.S, and load the main image to L2SRAM
which lets us use the SPD to initialize the SDRAM.

For all three bootup methods, the bootup process can be divided into two
stages: the first stage will initialize the corresponding controller,
configure the L2SRAM, then copy the second stage image to L2SRAM and
jump to it. The second stage image is just like the general U-Boot image
to configure all the hardware and boot up to U-Boot command line.

When boot from NAND, the eLBC controller will first load the first stage
image to internal 4K RAM buffer because it's also stored on the NAND
flash. The first stage image, also call 4K NAND loader, will initialize
the L2SRAM, load the second stage image to L2SRAM and jump to it. The 4K
NAND loader's code comes from the corresponding nand_spl directory, along
with the code twisted by CONFIG_NAND_SPL.

When boot from eSDHC/eSPI, there's no such a first stage image because
the CPU ROM code does the same work. It will initialize the L2SRAM
according to the config addr/word pairs on the fixed address and
initialize the eSDHC/eSPI controller, then load the second stage image
to L2SRAM and jump to it.

The macro CONFIG_SYS_RAMBOOT is used to control the code to produce the
second stage image for all different bootup methods. It's set in the
board config file when one of the bootup methods above is selected.
Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

If we move some of the functions in tlb.c around we need less
ifdefs.  The first stage loader just needs invalidate_tlb and
init_tlbs.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

We can pack the initial tlb_table in MAS register format and use
write_tlb to set things up.  This savings can be helpful for NAND
style first stage boot loaders.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Factor out the code we use to actually write a tlb entry.

set_tlb is a logical view of the TLB while write_tlb is a low level
matching the MAS registers.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

* Fix setting of ESDMODE (MR1) register - the bit shifting was wrong
* Fix the format string to match size in a debug print
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Skipping the interrupted instruction will accomplish nothing other
than turning a spurious interrupt into a crash.

External interrupts are not machine checks, so don't count them as such.
Signed-off-by: NScott Wood <scottwood@freescale.com>

Its reset value is random, and we sometimes read uninitialized TLB
arrays.  Make sure that we don't retain MAS8 from reading such an entry
if the VF bit in MAS8 is set, attempts to use the mapping will trap.
Signed-off-by: NScott Wood <scottwood@freescale.com>

We cannot handle any exceptions while running in AS1, as the exceptions
will transition back to AS0 without a valid mapping.
Signed-off-by: NScott Wood <scottwood@freescale.com>

Remove Ethernet node fixup from mgcoge and muas3001 boards and modify its
configs for the common mpc8260 code to use generic Ethernet fixup.
Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@noser.com>
Tested-by: NHeiko Schocher <hs@denx.de>