1. 14 4月, 2017 3 次提交
  2. 20 3月, 2017 1 次提交
  3. 19 3月, 2017 1 次提交
  4. 18 2月, 2017 1 次提交
  5. 13 2月, 2017 1 次提交
    • M
      flash: complete CONFIG_SYS_NO_FLASH move with renaming · e856bdcf
      Masahiro Yamada 提交于
      We repeated partial moves for CONFIG_SYS_NO_FLASH, but this is
      not completed. Finish this work by the tool.
      
      During this move, let's rename it to CONFIG_MTD_NOR_FLASH.
      Actually, we have more instances of "#ifndef CONFIG_SYS_NO_FLASH"
      than those of "#ifdef CONFIG_SYS_NO_FLASH".  Flipping the logic will
      make the code more readable.  Besides, negative meaning symbols do
      not fit in obj-$(CONFIG_...) style Makefiles.
      
      This commit was created as follows:
      
      [1] Edit "default n" to "default y" in the config entry in
          common/Kconfig.
      
      [2] Run "tools/moveconfig.py -y -r HEAD SYS_NO_FLASH"
      
      [3] Rename the instances in defconfigs by the following:
        find . -path './configs/*_defconfig' | xargs sed -i \
        -e '/CONFIG_SYS_NO_FLASH=y/d' \
        -e 's/# CONFIG_SYS_NO_FLASH is not set/CONFIG_MTD_NOR_FLASH=y/'
      
      [4] Change the conditionals by the following:
        find . -name '*.[ch]' | xargs sed -i \
        -e 's/ifndef CONFIG_SYS_NO_FLASH/ifdef CONFIG_MTD_NOR_FLASH/' \
        -e 's/ifdef CONFIG_SYS_NO_FLASH/ifndef CONFIG_MTD_NOR_FLASH/' \
        -e 's/!defined(CONFIG_SYS_NO_FLASH)/defined(CONFIG_MTD_NOR_FLASH)/' \
        -e 's/defined(CONFIG_SYS_NO_FLASH)/!defined(CONFIG_MTD_NOR_FLASH)/'
      
      [5] Modify the following manually
        - Rename the rest of instances
        - Remove the description from README
        - Create the new Kconfig entry in drivers/mtd/Kconfig
        - Remove the old Kconfig entry from common/Kconfig
        - Remove the garbage comments from include/configs/*.h
      Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      e856bdcf
  6. 31 1月, 2017 1 次提交
    • M
      mmc: move CONFIG_GENERIC_MMC to Kconfig · 54925327
      Masahiro Yamada 提交于
      Now, CONFIG_GENERIC_MMC seems equivalent to CONFIG_MMC.
      
      Let's create an entry for "config GENERIC_MMC" with "default MMC",
      then convert all macro defines in headers to Kconfig.  Almost all
      of the defines will go away.
      
      I see only two exceptions:
        configs/blanche_defconfig
        configs/sandbox_noblk_defconfig
      
      They define CONFIG_GENERIC_MMC, but not CONFIG_MMC.  Something
      might be wrong with these two boards, so should be checked later.
      
      Anyway, this is the output of the moveconfig tool.
      
      This commit was created as follows:
      
      [1] create a config entry in drivers/mmc/Kconfig
      
      [2] tools/moveconfig.py -r HEAD GENERIC_MMC
      
      [3] manual clean-up of garbage comments in doc/README.* and
          include/configs/*.h
      Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      Reviewed-by: NTom Rini <trini@konsulko.com>
      54925327
  7. 26 1月, 2017 2 次提交
  8. 15 1月, 2017 1 次提交
  9. 11 1月, 2017 3 次提交
    • M
      mmc: move DesignWare-based drivers to Kconfig · ae4c81e9
      Masahiro Yamada 提交于
      Move (and rename) the following CONFIG options to Kconfig:
      
        CONFIG_EXYNOS_DWMMC  (renamed to CONFIG_MMC_DW_EXYNOS)
        CONFIG_HIKEY_DWMMC   (renamed to CONFIG_MMC_DW_K3)
        CONFIG_SOCFPGA_DWMMC (renamed to CONFIG_MMC_DW_SOCFPGA)
      
      The "HIKEY" is a board name, so it is not suitable for the MMC
      controller name.  I am following the name used in Linux.
      
      This commit was generated as follows:
      
      [1] Rename the config options with the following command:
      find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
      -type f -print | xargs sed -i -e '
      s/CONFIG_EXYNOS_DWMMC/CONFIG_MMC_DW_EXYNOS/g
      s/CONFIG_HIKEY_DWMMC/CONFIG_MMC_DW_K3/g
      s/CONFIG_SOCFPGA_DWMMC/CONFIG_MMC_DW_SOCFPGA/g
      '
      
      [2] Commit the changes
      
      [3] Create the entries in drivers/mmc/Kconfig
          (with default y for EXYNOS and SOCFPGA)
      
      [4] Run the following:
      tools/moveconfig.py -y -r HEAD MMC_DW_EXYNOS MMC_DW_K3 MMC_DW_SOCFPGA
      
      [5] Sort and align drivers/mmc/Makefile for readability
      
      [6] Clean-up doc/README.socfpga by hand
      Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      Reviewed-by: NMarek Vasut <marex@denx.de>
      ae4c81e9
    • M
      mmc: move CONFIG_DWMMC to Kconfig, renaming to CONFIG_MMC_DW · 55ed3b46
      Masahiro Yamada 提交于
      This commit was created as follows:
      
      [1] Rename the option with the following command:
      find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
      -type f -print | xargs sed -i -e 's/CONFIG_DWMMC/CONFIG_MMC_DW/g'
      
      [2] create the entry for MMC_DW in drivers/mmc/Kconfig
          (the prompt and help were copied from Linux)
      
      [3] run "tools/moveconfig.py -y MMC_DW"
      
      [4] add "depends on MMC_DW" to the MMC_DW_ROCKCHIP entry
      
      [5] Clean-up doc/README.socfpga by hand
      Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      Reviewed-by: NMarek Vasut <marex@denx.de>
      55ed3b46
    • M
      ARM: socfpga: remove unused CONFIG option and cleanup README.socfpga · b1b1add3
      Masahiro Yamada 提交于
      CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH is defined in the socfpga_common.h,
      but not referenced at all.  Remove.
      
      Also, clean-up the README.socfpga.  CONFIG_MMC should not be defined
      in the header since it was moved to Kconfig by commit c2726995
      ("mmc: complete unfinished move of CONFIG_MMC").  I see no grep hit
      for the others.
      Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      Reviewed-by: NMarek Vasut <marex@denx.de>
      b1b1add3
  10. 04 1月, 2017 1 次提交
    • V
      spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible · 57897c13
      Vignesh R 提交于
      According to Section 11.15.4.9.2 Indirect Write Controller of K2G SoC
      TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit
      data interface writes until the last word of an indirect transfer
      otherwise indirect writes is known to fails sometimes. So, make sure
      that QSPI indirect writes are 32 bit sized except for the last write. If
      the txbuf is unaligned then use bounce buffer to avoid data aborts.
      
      So, now that the driver uses bounce_buffer, enable CONFIG_BOUNCE_BUFFER
      for all boards that use Cadence QSPI driver.
      
      [1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf
      Signed-off-by: NVignesh R <vigneshr@ti.com>
      Reviewed-by: NMarek Vasut <marex@denx.de>
      Reviewed-by: NJagan Teki <jagan@openedev.com>
      57897c13
  11. 30 12月, 2016 1 次提交
    • M
      mmc: complete unfinished move of CONFIG_MMC · c2726995
      Masahiro Yamada 提交于
      Commit 7a777f6d ("mmc: Add generic Kconfig option") created
      a Kconfig entry for this option without any actual moves, then
      commit 44c79879 ("sunxi: Use Kconfig CONFIG_MMC") moved
      instances only for SUNXI.
      
      We generally do not like such partial moves.  This kind of work
      is automated by tools/moveconfig.py, so it is pretty easy to
      complete this move.
      
      I am adding "default ARM || PPC || SANDBOX" (suggested by Tom).
      This shortens the configs and will ease new board porting.
      
      This commit was created as follows:
      
      [1] Edit Kconfig (remove the "depends on", add the "default",
          copy the prompt and help message from Linux)
      
      [2] Run 'tools/moveconfig.py -y -s -r HEAD MMC'
      Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
      c2726995
  12. 19 11月, 2016 1 次提交
  13. 24 10月, 2016 3 次提交
  14. 12 10月, 2016 1 次提交
  15. 27 9月, 2016 2 次提交
  16. 17 9月, 2016 9 次提交
  17. 10 9月, 2016 2 次提交
  18. 27 8月, 2016 1 次提交
    • T
      ARM: Move SYS_CACHELINE_SIZE over to Kconfig · 067716ba
      Tom Rini 提交于
      This series moves the CONFIG_SYS_CACHELINE_SIZE.  First, in nearly all
      cases we are mirroring the values used by the Linux Kernel here.  Also,
      so long as (and in this case, it is true) we implement flushes in hunks
      that are no larger than the smallest implementation (and given that we
      mirror the Linux Kernel, again we are fine) it is OK to align higher.
      The biggest changes here are that we always use 64 bytes for CPU_V7 even
      if for example the underlying core is only 32 bytes (this mirrors
      Linux).  Second, we say ARM64 uses 64 bytes not 128 (as found in the
      Linux Kernel) as we do not need multi-platform support (to this degree)
      and only the Cavium ThunderX 88xx series has a use for such large
      alignment.
      
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Stefano Babic <sbabic@denx.de>
      Cc: Prafulla Wadaskar <prafulla@marvell.com>
      Cc: Luka Perkov <luka.perkov@sartura.hr>
      Cc: Stefan Roese <sr@denx.de>
      Cc: Nagendra T S <nagendra@mistralsolutions.com>
      Cc: Vaibhav Hiremath <hvaibhav@ti.com>
      Acked-by: NLokesh Vutla <lokeshvutla@ti.com>
      Cc: Steve Rae <steve.rae@raedomain.com>
      Cc: Igor Grinberg <grinberg@compulab.co.il>
      Cc: Nikita Kiryanov <nikita@compulab.co.il>
      Cc: Stefan Agner <stefan.agner@toradex.com>
      Acked-by: NHeiko Schocher <hs@denx.de>
      Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
      Cc: Peter Griffin <peter.griffin@linaro.org>
      Acked-by: NPaul Kocialkowski <contact@paulk.fr>
      Cc: Anatolij Gustschin <agust@denx.de>
      Acked-by: N"Pali Rohár" <pali.rohar@gmail.com>
      Cc: Adam Ford <aford173@gmail.com>
      Cc: Steve Sakoman <sakoman@gmail.com>
      Cc: Grazvydas Ignotas <notasas@gmail.com>
      Cc: Nishanth Menon <nm@ti.com>
      Cc: Stephen Warren <swarren@wwwdotorg.org>
      Cc: Robert Baldyga <r.baldyga@samsung.com>
      Cc: Minkyu Kang <mk7.kang@samsung.com>
      Cc: Thomas Weber <weber@corscience.de>
      Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
      Cc: David Feng <fenghua@phytium.com.cn>
      Cc: Alison Wang <b18965@freescale.com>
      Cc: Michal Simek <michal.simek@xilinx.com>
      Cc: Simon Glass <sjg@chromium.org>
      Cc: York Sun <york.sun@nxp.com>
      Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com>
      Cc: Mingkai Hu <mingkai.hu@nxp.com>
      Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
      Cc: Aneesh Bansal <aneesh.bansal@freescale.com>
      Cc: Saksham Jain <saksham.jain@nxp.com>
      Cc: Qianyu Gong <qianyu.gong@nxp.com>
      Cc: Wang Dongsheng <dongsheng.wang@nxp.com>
      Cc: Alex Porosanu <alexandru.porosanu@freescale.com>
      Cc: Hongbo Zhang <hongbo.zhang@nxp.com>
      Cc: tang yuantian <Yuantian.Tang@freescale.com>
      Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
      Cc: Josh Wu <josh.wu@atmel.com>
      Cc: Bo Shen <voice.shen@atmel.com>
      Cc: Viresh Kumar <viresh.kumar@linaro.org>
      Cc: Hannes Schmelzer <oe5hpm@oevsv.at>
      Cc: Thomas Chou <thomas@wytron.com.tw>
      Cc: Joe Hershberger <joe.hershberger@ni.com>
      Cc: Sam Protsenko <semen.protsenko@linaro.org>
      Cc: Bin Meng <bmeng.cn@gmail.com>
      Cc: Christophe Ricard <christophe-h.ricard@st.com>
      Cc: Anand Moon <linux.amoon@gmail.com>
      Cc: Beniamino Galvani <b.galvani@gmail.com>
      Cc: Carlo Caione <carlo@endlessm.com>
      Cc: huang lin <hl@rock-chips.com>
      Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
      Cc: Xu Ziyuan <xzy.xu@rock-chips.com>
      Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com>
      Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar>
      Cc: Kever Yang <kever.yang@rock-chips.com>
      Cc: Samuel Egli <samuel.egli@siemens.com>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Hans de Goede <hdegoede@redhat.com>
      Cc: Ian Campbell <ijc@hellion.org.uk>
      Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com>
      Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
      Cc: Andre Przywara <andre.przywara@arm.com>
      Cc: Bernhard Nortmann <bernhard.nortmann@web.de>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Ben Whitten <ben.whitten@gmail.com>
      Cc: Tom Warren <twarren@nvidia.com>
      Cc: Alexander Graf <agraf@suse.de>
      Cc: Sekhar Nori <nsekhar@ti.com>
      Cc: Vitaly Andrianov <vitalya@ti.com>
      Cc: "Andrew F. Davis" <afd@ti.com>
      Cc: Murali Karicheri <m-karicheri2@ti.com>
      Cc: Carlos Hernandez <ceh@ti.com>
      Cc: Ladislav Michl <ladis@linux-mips.org>
      Cc: Ash Charles <ashcharles@gmail.com>
      Cc: Mugunthan V N <mugunthanvnm@ti.com>
      Cc: Daniel Allred <d-allred@ti.com>
      Cc: Gong Qianyu <Qianyu.Gong@freescale.com>
      Signed-off-by: NTom Rini <trini@konsulko.com>
      Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      Acked-by: NChin Liang See <clsee@altera.com>
      Tested-by: NStephen Warren <swarren@nvidia.com>
      Acked-by: NPaul Kocialkowski <contact@paulk.fr>
      067716ba
  19. 24 6月, 2016 1 次提交
    • M
      arm: socfpga: Fix "improve raw MMC SPL boot" · 61520ac4
      Marek Vasut 提交于
      This fixes commit d31e9c57 ,
      which broke booting from SD card on all SoCFPGA boards. The
      patch assumes the bootloader partition to be partition 3, at
      the end of the SD card, which doesn't make any sense. U-Boot
      assumes the bootloader partition is partition 1 or that the
      bootloader image is at offset +1 MiB from the start of SD card.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: Sylvain Lesne <lesne@alse-fr.com>
      61520ac4
  20. 02 6月, 2016 2 次提交
    • S
      arm: socfpga: improve raw MMC SPL boot · d31e9c57
      Sylvain Lesne 提交于
      Before this patch, when booting from MMC (no filesystem), the SPL
      loaded U-Boot from a fixed offset.
      It will now load U-Boot from an offset of 256kB (which is 4 times the
      padded SPL image) in the third partition.
      
      This behaviour is similar to what the vendor SPL (based on
      U-Boot 2013.01) does, and allows to directly 'dd' the
      u-boot-with-spl.sfp file to the A2 partition.
      Signed-off-by: NSylvain Lesne <lesne@alse-fr.com>
      d31e9c57
    • M
      arm: socfpga: Enable tiny printf and simple malloc in SPL · 5bb4050d
      Marek Vasut 提交于
      Enable both features to reduce the SPL size by 6 kiB.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Pavel Machek <pavel@denx.de>
      Cc: Stefan Roese <sr@denx.de>
      5bb4050d
  21. 17 5月, 2016 1 次提交
  22. 26 4月, 2016 1 次提交