- 22 5月, 2019 20 次提交
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由 Rajat Srivastava 提交于
Signed-off-by: NRajat Srivastava <rajat.srivastava@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Ashish Kumar 提交于
Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: NRajat Srivastava <rajat.srivastava@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Udit Agarwal 提交于
ENVL_NOWHERE is dependent on CONFIG_ENV_IS_NOWHERE and not on CONFIG_CHAIN_OF_TRUST so return ENVL_NOWHERE when CONFIG_ENV_IS_NOWHERE is enabled Signed-off-by: NUdit Agarwal <udit.agarwal@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Vinitha V Pillai 提交于
esbc_validate command will not be executed if “load” command for its header fails and will further execute the source command for bootscript, without its validation and boot process continues. To halt the boot process in case secure boot header is not loaded successfully, esbc_validate command is invoked separately after “load” command. The secure boot validation of the bootscript header will fail (if header is not loaded) and halts the boot process, which prevent source command from execution. Signed-off-by: NVinitha V Pillai <vinitha.pillai@nxp.com> Signed-off-by: NUdit Agarwal <udit.agarwal@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Florin Chiculita 提交于
AQR107 PHYs interrupt pins are active-low, while the GIC expects a level-high signal. Signed-off-by: NFlorin Chiculita <florinlaurentiu.chiculita@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Peng Ma 提交于
Distinguish the ecc val by chassis version and move the ecc addr to dts. Add ls1028a soc support. Signed-off-by: NPeng Ma <peng.ma@nxp.com> Reviewed-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Peng Ma 提交于
Move the ecc addr from driver to dts. Signed-off-by: NPeng Ma <peng.ma@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Chuanhua Han 提交于
Enables CONFIG_SPI_FLASH Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Yuantian Tang 提交于
LS1028AQDS Development System is a high-performance computing, evaluation, and development platform that supports LS1028A QorIQ Architecture processor. Signed-off-by: NSudhanshu Gupta <sudhanshu.gupta@nxp.com> Signed-off-by: NRai Harninder <harninder.rai@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: NBhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Signed-off-by: NTang yuantian <andy.tang@nxp.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Yuantian Tang 提交于
LS1028A is an ARMv8 implementation. LS1028ARDB is an evaluation platform that supports the LS1028A family SoCs. This patch add basic support of the platform. Signed-off-by: NSudhanshu Gupta <sudhanshu.gupta@nxp.com> Signed-off-by: NRai Harninder <harninder.rai@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: NBhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Yuantian Tang 提交于
Ls1028a SoC is based on Layerscape Chassis Generation 3.2 architecture with features: 2 ARM v8 Cortex-A72 cores, CCI400, SEC, DDR3L/4, LCD, GPU, TSN ENETC, 2 USB 3.0, 2 eSDHC, 2 FlexCAN, 2 SPI, SATA, 8 I2C controllers, 6 LPUARTs, GPIO, SAI, qDMA, eDMA, GIC, TMU etc. Signed-off-by: NSudhanshu Gupta <sudhanshu.gupta@nxp.com> Signed-off-by: NRai Harninder <harninder.rai@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: NBhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
Enable the PCIe Gen4 controller driver and e1000 for LX2160ARDB and LX2160AQDS boards. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
The LX2160A integrated 6 PCIe Gen4 controllers. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
Add the infrastructure for Layerscape SoCs PCIe Gen4 controller to update device tree nodes to convey SMMU stream IDs in the device tree. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
The LX2160A PCIe is using driver PCIE_LAYERSCAPE_GEN4 instead of PCIE_LAYERSCAPE. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
Add PCIe Gen4 driver for the NXP Layerscape SoCs. This PCIe controller is based on the Mobiveil IP, which is compatible with the PCI Express™ Base Specification, Revision 4.0. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: NBao Xiaowei <Xiaowei.Bao@nxp.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
The lx2160a have up to 6 PCIe controllers and have different address and size of PCIe region. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
The LS2080A has 8GB region for each PCIe controller, while the other platforms have 32GB. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Hou Zhiqiang 提交于
Change to use PCIe address macro to determine if precompile the PCIe MMU table entry. Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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由 Kuldeep Singh 提交于
Update mtd-id for QSPI nor due to change introduced in mtd/spi in linux 5.0. commit 84d043185dbe ("spi: Add a driver for the Freescale/NXP QuadSPI controller") This modification is only for linux kernel version >= 5.0. To use bootargs for kernel < 5.0, use the following bootargs CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:2m(uboot),14m(free)" CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:2m(uboot),14m(free)" Signed-off-by: NKuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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- 21 5月, 2019 20 次提交
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git://git.denx.de/u-boot-mpc83xx由 Tom Rini 提交于
- Update MPC83xx platform support to current best practices, etc.
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https://github.com/MrVan/u-boot由 Tom Rini 提交于
"Please pull mmc-5-20 for v2019.07, this is to avoid break i.MX53 boot."
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git://git.denx.de/u-boot-video由 Tom Rini 提交于
- update for using splashfile instead of location->name when loading the splash image from a FIT - updates for loading internal and external splash data from FIT - DM_GPIO/DM_VIDEO migration for mx53 cx9020 board - fix boot issue on mx6sabresd board after DM_VIDEO migration - increase the max preallocated framebuffer BPP to 32 in ipuv3 driver to prepare for configurations with higher color depth - allow to use vidconsole_put_string() in board code for text output on LCD displays
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由 Dirk Eibach 提交于
The gdsys gazerbeam board is based on a Freescale MPC8308 SOC. It boots from NOR-Flash, kernel and rootfs are stored on SD-Card. On board peripherals include: - 2x 10/100 Mbit/s Ethernet (optional) Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Add a U-Boot specific dts file, which encapsulates the needed modifications to the Gazerbeam Linux device tree. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Import the Linux device tree for the Gazerbeam board. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
The single channel detection in the gazerbeam board driver was not implemented correctly. Fix the detection. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Use a more extensive FPGA feature reporting style in the gdsys ioep-fpga driver. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Make the ioloop command DM compatible, while keeping the old functionality for not-yet-converted boards. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Replace the boolean parameter of io_check_status that controls whether the status is printed or not with a documenting enum. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Fix some style violations in the ioloop command, and make the code more readable where possible. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
More recent versions of IHS FPGAs feature a different memory layout. Add a Kconfig option to differentiate between the legacy layout, and the new layout (which is used on the upcoming "Gazerbeam" and later boards). Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Future gdsys boards will switch from the legacy drivers in board/gdsys/common to DM-based drivers. Define a Kconfig option that disables the legacy drivers. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
The "manual" RAM configuration should not be used if the DM RAM driver is active, hence, disable the code if the CONFIG_MPC83XX_SDRAM config variable is defined. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Move CONFIG_SYS_FPGA0_BASE, CONFIG_SYS_FPGA0_SIZE, CONFIG_SYS_FPGA1_BASE, and CONFIG_SYS_FPGA1_SIZE to Kconfig. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Since the gpio output status on MPC8xxx cannot be read back, it has to be buffered locally. Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
Fix some style violations in the gdsys MPC8308 board files, and make the code more readable. Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Mario Six 提交于
The ppc4xx architecture was removed, and with it several old gdsys 44x boards, but some "debris" from these purged boards was left over. This patch removes these remnants (mostly entries in Makefiles, some now superfluous data structures and some now obsolete config variables from the whitelist). Signed-off-by: NMario Six <mario.six@gdsys.cc>
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由 Dirk Eibach 提交于
The initialization sequence in the newest release notes of the 88e1518 phy omits two commands. Remove them from the sequence. Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>
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由 Mario Six 提交于
For the DM case, use the proper parameter for the regmap_init_mem call (which is the ofnode, not the udevice). Signed-off-by: NMario Six <mario.six@gdsys.cc> Reviewed-by: NSimon Glass <sjg@chromium.org>
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