- 19 2月, 2018 14 次提交
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由 Jean-Jacques Hiblot 提交于
This callback is used to send the 74 clock cycles after power up. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
When the clock is applied, compute the actual value of the clock. It may be slightly different from the requested value (max freq, divisor threshold) Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
The default configuration is usually working fine for the the HS modes. Don't enforce the presence of a dedicated pinmux for the HS modes. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Kishon Vijay Abraham I 提交于
AM572x SR1.1 requires different IODelay values to be used than that used in AM572x SR2.0. These values are populated in device tree. Add capability in omap_hsmmc driver to extract IOdelay values for different silicon revision. The maximum frequency is also reduced when using a ES1.1. To keep the ability to boot both revsions with the same dtb, those values can be provided by the platform code. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Kishon Vijay Abraham I 提交于
The data manual of J6/J6 Eco recommends to set different IODELAY values depending on the mode in which the MMC/SD is enumerated in order to ensure IO timings are met. Add support to parse mux values and iodelay values from device tree and set these depending on the enumerated MMC mode. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Kishon Vijay Abraham I 提交于
Use the mmc_of_parse library function to populate mmc_config instead of repeating the same code in host controller driver. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
>From OMAP3 SoCs (OMAP3, OMAP4, OMAP5, AM572x, AM571x), the DAT/CMD lines reset procedure section in TRM suggests to first poll the SRD/SRC bit until it is set to 0x1. But looks like that bit is never set to 1 and there is an observable delay of 1sec everytime the driver tries to reset DAT/CMD. (The same is observed in linux kernel). Reduce the time the driver waits for the controller to set the SRC/SRD bits to 1 so that there is no observable delay. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
According to errata i802, DCRC error interrupts (MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure. The DCRC interrupt, occurs when the last tuning block fails (the last ratio tested). The delay from CRC check until the interrupt is asserted is bigger than the delay until assertion of the tuning end flag. Assertion of tuning end flag is what masks the interrupts. Because of this race, an erroneous DCRC interrupt occurs. The suggested workaround is to disable DCRC interrupts during the tuning procedure which is implemented here. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
HS200/SDR104 requires tuning command to be sent to the card. Use the mmc_send_tuning library function to send the tuning command and configure the internal DLL. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Kishon Vijay Abraham I 提交于
In order to enable DDR mode, Dual Data Rate mode bit has to be set in MMCHS_CON register. Set it here. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
Use the timing parameter set in the MMC core to set the mode in UHSMS bit field. This is in preparation for adding HS200 support in omap hsmmc driver. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Kishon Vijay Abraham I 提交于
"ti,dual-volt" is used in linux kernel to set the voltage capabilities. For host controller dt nodes that doesn't have "ti,dual-volt", it's assumed 1.8v is the io voltage. This is not always true (like in the case of beagle-x15 where the io lines are connected to 3.3v). Hence if "no-1-8-v" property is set, io voltage will be set to 3v. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Kishon Vijay Abraham I 提交于
No functional change. Move bus width configuration setting to a separate function and invoke it only if there is a change in the bus width. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
Add a separate function for starting the clock, stopping the clock and setting the clock. Starting the clock and stopping the clock can be used irrespective of setting the clock (For example during iodelay recalibration). Also set the clock only if there is a change in frequency. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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- 20 1月, 2018 3 次提交
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由 Kishon Vijay Abraham I 提交于
omap_hsmmc driver uses "|" in a couple of places for disabling a bit. While it's okay to use it in "mmc_reg_out" (since mmc_reg_out has a _mask_ argument to take care of resetting a bit), it's incorrectly used for resetting flags in "omap_hsmmc_send_cmd". Fix it here by using "&= ~()" to reset a bit. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Kishon Vijay Abraham I 提交于
Instead of sending STOP TRANSMISSION command from MMC core, enable the auto command feature so that the Host Controller issues CMD12 automatically when last block transfer is completed. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Kishon Vijay Abraham I 提交于
The omap hsmmc host controller can have the ADMA2 feature. It brings better read and write throughput. On most SOC, the capability is read from the hl_hwinfo register. On OMAP3, DMA support is compiled out. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 19 1月, 2018 1 次提交
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由 Jean-Jacques Hiblot 提交于
This reverts commit 46831c1a. This reserved area at the beginning of struct hsmm, will be used later to support ADMA Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 12 1月, 2018 1 次提交
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由 Felix Brack 提交于
This patch fixes some warnings when building boards that do not define DM_I2C_COMPAT i.e. boards that entirely rely on the new i2c layer. Signed-off-by: NFelix Brack <fb@ltec.ch>
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- 01 8月, 2017 1 次提交
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由 Simon Glass 提交于
At present if U-Boot proper uses driver model for MMC, then SPL has to also. While this is desirable, it places a significant barrier to moving to driver model in some cases. For example, with a space-constrained SPL it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves adjusting some drivers. Add new SPL versions of the options for DM_MMC, DM_MMC_OPS and BLK. By default these follow their non-SPL versions, but this can be changed by boards which need it. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 01 6月, 2017 1 次提交
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由 Simon Glass 提交于
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing functions to avoid confusion. In the end we will have: 1. dev_read_addr...() - works on devices, supports flat/live tree 2. devfdt_get_addr...() - current functions, flat tree only 3. of_get_address() etc. - new functions, live tree only All drivers will be written to use 1. That function will in turn call either 2 or 3 depending on whether the flat or live tree is in use. Note this involves changing some dead code - the imx_lpi2c.c file. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 15 5月, 2017 1 次提交
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由 Jean-Jacques Hiblot 提交于
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 12 5月, 2017 2 次提交
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由 Lokesh Vutla 提交于
For platforms that don't use device tree in SPL the only way to mark this driver as 'required by relocation' is with the DM_FLAG_PRE_RELOC flag. Add this to ensure that the driver is bound. Reviewed-by: NTom Rini <trini@konsulko.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Lokesh Vutla 提交于
This is to aid platforms that uses OF_PLATDATA. Reviewed-by: NTom Rini <trini@konsulko.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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- 10 5月, 2017 1 次提交
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由 Adam Ford 提交于
This patch changes the way DM_MMC calculates offset to the base register of MMC. Previously this was through an #ifdef but that wasn't necessary for OMAP3. This patch will now add in the offset to the base address based on the .compatible flags. Signed-off-by: NAdam Ford <aford173@gmail.com> V2: Remove ifdef completely and reference offset from the omap_hsmmc_ids table. V1: Change ifdef to ignore OMAP3 Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 30 3月, 2017 4 次提交
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由 Jean-Jacques Hiblot 提交于
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Jean-Jacques Hiblot 提交于
This is a preparation work for the support of CONFIG_BLK. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Jean-Jacques Hiblot 提交于
Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Jean-Jacques Hiblot 提交于
For consistency, use an accessor to access the private data. Also for the same reason, rename all priv_data to priv. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 10 2月, 2017 1 次提交
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由 Tom Rini 提交于
It was incorrect to always include "asm/arch-omap3/mux.h" constantly. This introduced warnings on non-omap3 where certain values will conflict between the various families. Conditionally guard the inclusion in order to correct the problem. Fixes: 6aca17c9 ("drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36xx") Signed-off-by: NTom Rini <trini@konsulko.com>
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- 09 2月, 2017 1 次提交
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由 Adam Ford 提交于
On the OMAP36xx/37xx the CONTROL_WKUP_CTRL register has a field (bit 6) named GPIO_IO_PWRDNZ. If 0, the IO buffers which are related to GPIO_126, 127 and 129 are disabled. Some boards may need this for MMC. After the PBIAS is configured, this bit should be set high to enable these GPIO pins. Signed-off-by: NAdam Ford <aford173@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 08 2月, 2017 1 次提交
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由 Simon Glass 提交于
At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 11 1月, 2017 1 次提交
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由 Jaehoon Chung 提交于
To maintain consistency, set_ios type of legacy mmc_ops changed to int. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
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- 05 12月, 2016 1 次提交
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由 Lokesh Vutla 提交于
Palmas driver assumes it is always TPS659xx regulator on all DRA7xx based boards to enable mmc regulator. This is not true always like in case of DRA71x-evm. So get this information based on the board. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NVignesh R <vigneshr@ti.com> Signed-off-by: NNishanth Menon <nm@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com> [trini: Delete omap4_vmmc_pbias_config from omap_hsmmc.c] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 04 12月, 2016 1 次提交
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由 Nishanth Menon 提交于
CONFIG_AM57XX is just an unnecessary macro that is redundant given So, remove the same instead of spreading through out the u-boot source code and getting in the way to maintain common code for DRA7x family. Acked-by: NAndrew F. Davis <afd@ti.com> Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 16 8月, 2016 1 次提交
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由 Sekhar Nori 提交于
structure member 'cd_inverted' of omap_hsmmc_data is available only when OMAP_HSMMC_USE_GPIO is defined. When CONFIG_DM_MMC is defined, but not CONFIG_OMAP_GPIO, this will cause build breakage in omap_hsmmc driver of the sort: CC drivers/mmc/omap_hsmmc.o ../drivers/mmc/omap_hsmmc.c: In function 'omap_hsmmc_ofdata_to_platdata': ../drivers/mmc/omap_hsmmc.c:1763:6: error: 'struct omap_hsmmc_data' has no member named 'cd_inverted' priv->cd_inverted = fdtdec_get_bool(fdt, node, "cd-inverted"); ^ Fix this by accessing cd_inverted only when OMAP_HSMMC_USE_GPIO is defined. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 05 8月, 2016 1 次提交
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由 Jaehoon Chung 提交于
Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NMinkyu Kang <mk7.kang@samsung.com>
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- 10 6月, 2016 1 次提交
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由 Heiko Schocher 提交于
Enable 8bit interface on HSMMC2 for am33xx to support 8bit eMMC chips. Signed-off-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 17 5月, 2016 1 次提交
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由 Simon Glass 提交于
Update the existing drivers to set up this new pointer. This will be required by the MMC uclass. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 19 4月, 2016 1 次提交
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由 Mugunthan V N 提交于
Add request gpio for CD and WP gpios, so that the gpio can be used for the respective purposes. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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