- 12 1月, 2018 18 次提交
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由 Rick Chen 提交于
Add documents to describe NX25 and AE250. Also update other documents for RISC-V. Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com>
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由 Rick Chen 提交于
Support common commands bdinfo and image format, also modify common generic flow for RISC-V. Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Rick Chen 提交于
Run hello_world successfully. U-Boot 2018.01-rc2-00033-gb265b91-dirty (Dec 22 2017 - 13:54:21 +0800) DRAM: 1 GiB MMC: mmc@f0e00000: 0 SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB In: serial@f0300000 Out: serial@f0300000 Err: serial@f0300000 Net: Warning: mac@e0100000 (eth0) using random MAC address - 0a:47:9b:f8:b4:f2 eth0: mac@e0100000 RISC-V # mmc rescan RISC-V # fatls mmc 0:1 318907 u-boot-ae250-64.bin 1252 hello_world_ae250_32.bin 328787 u-boot-ae250-32.bin 3 file(s), 0 dir(s) RISC-V # fatload mmc 0:1 0x600000 hello_world_ae250_32.bin reading hello_world_ae250_32.bin 1252 bytes read in 23 ms (52.7 KiB/s) RISC-V # go 0x600000 Example expects ABI version 9 Actual U-Boot ABI version 9 Hello World argc = 1 argv[0] = "0x600000" argv[1] = "$B@" Hit any key to exit ... RISC-V # Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com>
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由 Rick Chen 提交于
Add prelink-riscv to arrange .rela.dyn and .rela.got in compile time. So that u-boot can be directly executed without fixup. Signed-off-by: NChih-Mao Chen <cmchen@andestech.com> Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com>
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由 Rick Chen 提交于
Add nx25-ae250 default configuration for RISC-V Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com>
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由 Rick Chen 提交于
Add nx25-ae250 board configuartion options for RISC-V Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com>
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由 Rick Chen 提交于
Add nx25-ae250 board to do platform initializations. Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com>
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由 Rick Chen 提交于
Add Kconfig and makefile for RISC-V Also modify MAINTAINERS for it. Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com> Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
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由 Rick Chen 提交于
Add header files for RISC-V. Cache, ptregs, data type and other definitions are included. Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com>
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由 Rick Chen 提交于
AE250 is the Soc using NX25 cpu core base on RISC-V arch. Details please see the doc/README.ae250. Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com>
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由 Rick Chen 提交于
Add makefile, interrupts.c and boot.c,... functions to support RISC-V arch. Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com> Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
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由 Rick Chen 提交于
Add Andes nx25 cpu core (called AndesStar V5) to support RISC-V arch Verifications: 1. startup and relocation ok. 2. boot from rom or ram both ok. 2. timer driver ok. 3. uart driver ok 4. mmc driver ok 5. spi driver ok. 6. 32/64 bit both ok. Detail verification message please see doc/README.ae250. Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com> Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
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由 Jagan Teki 提交于
a64-olinuxino has 8GiB eMMC, enable it. Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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- 11 1月, 2018 15 次提交
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由 Hannes Schmelzer 提交于
The clock selection is done now from the am335x-fb code, so there is no more need doing this in the board code. Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: NAnatolij Gustschin <agust@denx.de>
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由 Hannes Schmelzer 提交于
Actual am335x-fb implementation takes now a real clock frequency instead a divider. So this component doesn't need to know anymore some base frequency of the LCDC, we simply provide the pixel-clock frequency. Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: NAnatolij Gustschin <agust@denx.de>
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由 Hannes Schmelzer 提交于
The LCDC IP-core an be feed from several clock sources, one of those is a dedicated DPLL for generating a dividable base-clock for this IP-core. The TRM specifies the maximum input frequency for the LCCD with 200 MHz, so we must not exceed this value with the PLL frequency (which can lock much higher). This patch tries every combination of multipliers and divisors of the PLL and the IP-core itself for getting as near as possible the the requested panel->pxl_clk. Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: NAnatolij Gustschin <agust@denx.de>
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由 Hannes Schmelzer 提交于
Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: NAnatolij Gustschin <agust@denx.de>
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由 Hannes Schmelzer 提交于
Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: NAnatolij Gustschin <agust@denx.de>
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由 Hannes Schmelzer 提交于
Adds the register definition of the Display DPLL Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: NAnatolij Gustschin <agust@denx.de>
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由 Sumit Garg 提交于
Signed-off-by: NUdit Agarwal <udit.agarwal@nxp.com> Signed-off-by: NSumit Garg <sumit.garg@nxp.com> [YS: run moveconfig.py -s] Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Sumit Garg 提交于
Using changes in this patch we were able to reduce approx 8k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1088a/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1088a/ls1088a.c to keep board_early_init_f funcations in case of SPL build. 3. Changes in ls1088a_common.h & ls1088ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Sumit Garg 提交于
Compile-off mp.c and libfdt.c in case of SPL build. SPL size reduces by approx 2k. Signed-off-by: NSumit Garg <sumit.garg@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Bao Xiaowei 提交于
Remove duplicate macro CONFIG_FSL_PCIE_RESET and update its comment. It enables PCIe reset to fix link width 2x - 4x. Signed-off-by: NBao Xiaowei <xiaowei.bao@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Alison Wang 提交于
855873: An eviction might overtake a cache clean operation Workaround: The erratum can be avoided by upgrading cache clean by address operations to cache clean and invalidate operations. For Cortex-A53 r0p3 and later release, this can be achieved by setting CPUACTLR.ENDCCASCI to 1. This patch is to implement the workaround for this erratum. Signed-off-by: NAlison Wang <alison.wang@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Ahmed Mansour 提交于
The CONFIG_SYS_DPAA_QBMAN define is used by DPAA1 freescale SOCs to add device tree fixups that allow deep sleep in Linux. The define was placed in header files included by a number of boards, but was not explicitly documented in any of the Kconfigs. A description was added to the drivers/networking menuconfig and default selection for current SOCs that have this part Signed-off-by: NAhmed Mansour <ahmed.mansour@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Ahmed Mansour 提交于
This patch adds changes necessary to move functionality present in PowerPC folders with ARM architectures that have DPAA1 QBMan hardware - Create new board/freescale/common/fsl_portals.c to house shared device tree fixups for DPAA1 devices with ARM and PowerPC cores - Add new header file to top includes directory to allow files in both architectures to grab the function prototypes - Port inhibit_portals() from PowerPC to ARM. This function is used in setup to disable interrupts on all QMan and BMan portals. It is needed because the interrupts are enabled by default for all portals including unused/uninitialised portals. When the kernel attempts to go to deep sleep the unused portals prevent it from doing so Signed-off-by: NAhmed Mansour <ahmed.mansour@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Yuantian Tang 提交于
Sata registers PP2C and PP3C are used to control the configuration of the PHY control OOB timing for the COMINIT/COMWAKE parameters respectively. Calculate those parameters from port clock frequency. Overwrite those registers with calculated values to get better OOB timing. Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Ashish Kumar 提交于
Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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- 10 1月, 2018 7 次提交
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由 Tom Rini 提交于
Given gcc-6.1 and later we can now safely have strings discarded when the functions are unused. This lets us drop certain cases of not building something so that we don't have the strings brought in when the code was discarded. Simplify the code now by dropping guards we don't need now. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chander Kashyap <k.chander@samsung.com> Cc: Thomas Abraham <thomas.ab@samsung.com> Cc: Vipin Kumar <vipin.kumar@st.com> Cc: Wenyou Yang <wenyou.yang@microchip.com> Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Jean-Jacques Hiblot 提交于
commit 21a24c3b ("fs/fat: fix case for FAT shortnames") made it possible that get_name() returns file names with some upper cases. find_directory_entry() must be updated to take this account, and use case-insensitive functions to compare file names. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Masahiro Yamada 提交于
Follow Linux commit ed067d4a859f ("linux/kernel.h: Add ALIGN_DOWN macro"). Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Tuomas Tynkkynen 提交于
The following config symbols are only defined once and never referenced anywhere else: CONFIG_AP325RXA CONFIG_AP_SH4A_4A CONFIG_CPU_SH_TYPE_R CONFIG_ECOVEC CONFIG_ESPT CONFIG_MIGO_R CONFIG_MPR2 CONFIG_MS7720SE CONFIG_MS7722SE CONFIG_MS7750SE CONFIG_R0P7734 CONFIG_R2DPLUS CONFIG_RSK7203 CONFIG_RSK7264 CONFIG_RSK7269 CONFIG_SH7752EVB CONFIG_SH7753EVB CONFIG_SH7757LCR CONFIG_SH7763RDP CONFIG_SH7785LCR Most of them are config symbols named after the respective boards which seems to have been a standard practice at some point. Signed-off-by: NTuomas Tynkkynen <tuomas@tuxera.com>
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由 Tuomas Tynkkynen 提交于
These macros are all defined once and never checked or used anywhere: CONFIG_MACH_ASPENITE CONFIG_MACH_DAVINCI_CALIMAIN CONFIG_MACH_DOCKSTAR CONFIG_MACH_EDMINIV2 CONFIG_MACH_GOFLEXHOME CONFIG_MACH_GONI CONFIG_MACH_GURUPLUG CONFIG_MACH_KM_KIRKWOOD CONFIG_MACH_OPENRD_BASE CONFIG_MACH_SHEEVAPLUG Almost all of them were only used for the mach_is_foo() logic in arch/arm/asm/mach-types.h that were dropped in commit f9dadaef ("arm: Re-sync asm/mach-types.h with Linux Kernel v4.9") Signed-off-by: NTuomas Tynkkynen <tuomas@tuxera.com>
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由 Sekhar Nori 提交于
Configure AM57xx EVMs for the exact PHY part that is present on the various boards. This makes U-Boot apply configurations needed for this PHY like centering the FLP timing. For configurations to take effect, DM_ETH needs to be enabled. Do that too. Tested on BeagleBoard x15 and AM571x IDK. Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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