riscv: cpu: Add nx25 to support RISC-V
Add Andes nx25 cpu core (called AndesStar V5) to support RISC-V arch Verifications: 1. startup and relocation ok. 2. boot from rom or ram both ok. 2. timer driver ok. 3. uart driver ok 4. mmc driver ok 5. spi driver ok. 6. 32/64 bit both ok. Detail verification message please see doc/README.ae250. Signed-off-by: NRick Chen <rick@andestech.com> Signed-off-by: NRick Chen <rickchen36@gmail.com> Signed-off-by: NGreentime Hu <green.hu@gmail.com> Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
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arch/riscv/cpu/nx25/Makefile
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arch/riscv/cpu/nx25/cpu.c
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arch/riscv/cpu/nx25/start.S
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arch/riscv/cpu/nx25/u-boot.lds
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