- 08 1月, 2020 1 次提交
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由 Jean-Jacques Hiblot 提交于
Make the board driver available in the SPL too. The board driver is a way to provide useful information about the board and that can be useful in the SPL too. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 15 12月, 2019 1 次提交
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由 Simon Glass 提交于
Add a simple PMC for sandbox to permit tests to run. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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- 10 12月, 2019 1 次提交
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由 Rick Chen 提交于
When ax25-ae350 try to enable v5l2 cache driver in SPL configuration, it need this option for cache support in SPL. Signed-off-by: NRick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Cc: Alan Kao <alankao@andestech.com>
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- 05 12月, 2019 1 次提交
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由 Miquel Raynal 提交于
Move MTD-related lines out of the root Makefile. Put them in their respective directories. Enclose some of these new lines to skip them when building the SPL. MTD core files and some MTD device drivers are compiled in a mtd.o object and included in the final object only if MTD support is required (there are two different symbols for that, one for U-Boot and one for the SPL). Now that all defconfigs have been fixed, we can stop the logic where enabling a command selects the core files to compile. This logic is broken since selecting a symbol with a 'depends on' will not enforce this secondary dependency. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
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- 24 10月, 2019 1 次提交
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由 Faiz Abbas 提交于
Add Support for UFS Host Controller Interface (UFSHCI) for communicating with Universal Flash Storage (UFS) devices. The steps to initialize the host controller interface are the following: - Initiate the Host Controller Initialization process by writing to the Host controller enable register. - Configure the Host Controller base address registers by allocating a host memory space and related data structures. - Unipro link startup procedure - Check for connected device - Configure UFS host controller to process requests Also register this host controller as a SCSI host controller. Taken from Linux Kernel v5.2 (drivers/scsi/ufs/ufshcd.c) and ported to U-boot. Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com>
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- 12 8月, 2019 1 次提交
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由 Simon Glass 提交于
This is no-longer used in U-Boot and has not been converted to driver model. Drop it. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 21 7月, 2019 1 次提交
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由 Simon Goldschmidt 提交于
This adds separate kconfig options for drivers/sysreset and drivers/firmware. Up to now, CONFIG_SPL_DRIVERS_MISC_SUPPORT added drivers/misc to SPL build but also added drivers/firmware and drivers/sysreset at the same time. Since that is confusing, this patch uses CONFIG_SPL_SYSRESET for drivers/sysreset and adds CONFIG_SPL_FIRMWARE for drivers/firmware (and accordingly for the TPL options). CONFIG_SPL_DRIVERS_MISC_SUPPORT stays for including drivers/misc into the SPL build (and accordingly for TPL) since there are boards using non-DM (non UCLASS_MISC) files from drivers/misc. Such boards don't have CONFIG_SPL_MISC enabled, so cannot use this to include drivers/misc into the SPL build. Signed-off-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
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- 11 7月, 2019 1 次提交
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由 Ramon Fried 提交于
Introduce new UCLASS_PCI_EP class for handling PCI endpoint devices, allowing to set various attributes of the PCI endpoint device, such as: * configuration space header * BAR definitions * outband memory mapping * start/stop PCI link Signed-off-by: NRamon Fried <ramon.fried@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 06 5月, 2019 1 次提交
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由 Ley Foon Tan 提交于
Compile ALTERA_SDRAM driver in SPL only. Rename ALTERA_SDRAM to SPL_ALTERA_SDRAM. Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
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- 05 5月, 2019 1 次提交
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由 Dinh Nguyen 提交于
The cache UCLASS will be used for configure settings that can be found in a CPU's L2 cache controller. Add a uclass and a test for cache. Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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- 20 2月, 2019 1 次提交
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由 Simon Glass 提交于
At present this uclass is selected only on x86. In order to add a test for it, it must also support sandbox. Create a new CONFIG_PCH option and enable it on x86 and sandbox. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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- 26 1月, 2019 2 次提交
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由 Andrew F. Davis 提交于
Do this by using $(SPL_) in Makefiles and CONFIG_IS_ENABLED in C code. This ensures the files and features are only built into the right build for which they are enabled. Using the macros to simplify this patch was made possible by the config symbol rename done in the last patch. Signed-off-by: NAndrew F. Davis <afd@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com> Acked-by: NLukasz Majewski <lukma@denx.de>
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由 Andrew F. Davis 提交于
The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT to allow for cleaner use in code. Signed-off-by: NAndrew F. Davis <afd@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com> Acked-by: NLukasz Majewski <lukma@denx.de>
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- 11 1月, 2019 1 次提交
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由 Jean-Jacques Hiblot 提交于
The SPL option for USB gadget should be named after the option for u-boot (CONFIG_USB_GADGET) Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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- 01 1月, 2019 1 次提交
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由 Peng Fan 提交于
Introduce DDR driver for i.MX8M. The driver will be used by SPL to initialze DDR PHY and DDR Controller. Signed-off-by: NPeng Fan <peng.fan@nxp.com>
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- 15 12月, 2018 1 次提交
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由 Jean-Jacques Hiblot 提交于
Some drivers might need to access common USB functions such as usb_get_maximum_speed() or usb_get_dr_mode(). Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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- 13 12月, 2018 2 次提交
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由 Sekhar Nori 提交于
Building U-Boot with CONFIG_PCI and CONFIG_DM_PCI enabled, but CONFIG_SPL_PCI_SUPPORT disabled, results in following linker error: lib/built-in.o: In function `fdtdec_get_pci_bar32': lib/fdtdec.c:305: undefined reference to `dm_pci_read_bar32' fdtdec.c:305:(.text.fdtdec_get_pci_bar32+0x24): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `dm_pci_read_bar32' This is because reference to dm_pci_read_bar32() remains in lib/fdtdec.c while SPL build does not descend into drivers/pci directory in drivers/Makefile if CONFIG_SPL_PCI_SUPPORT is not enabled. Fix this by applying appropriate #define guards in lib/fdtdec.c. It looks like ns16550.c has the same problem, so fixed that too. To simplify this, CONFIG_SPL_PCI_SUPPORT is renamed to CONFIG_SPL_PCI (enables use of CONFIG_IS_ENABLED() macro). Suggested-by: NVignesh R <vigneshr@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
The function part_init() will only be built when we have both CONFIG_PARTITIONS and CONFIG_HAVE_BLOCK_DEVICE set. Protect the call to this function with both of these tests now. Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: York Sun <york.sun@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Stefan Roese <sr@denx.de> Cc: Marek Behún <marek.behun@nic.cz> Cc: Vanessa Maegima <vanessa.maegima@nxp.com> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Adam Ford <aford173@gmail.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 07 12月, 2018 1 次提交
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由 Benjamin Gaignard 提交于
This is uclass for Hardware Spinlocks. It implements two mandatory operations: lock and unlock and one optional relax operation. Signed-off-by: NBenjamin Gaignard <benjamin.gaignard@linaro.org> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
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- 26 11月, 2018 1 次提交
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由 Simon Glass 提交于
At present these subsystems are only supported in U-Boot proper but it is sometimes necessary to support them in SPL, or even TPL. Update the Kconfig and Makefile to support this. Also adjust GPIO so that it can be used in TPL if required. Reviewed-by: NTom Rini <trini@konsulko.com> Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 15 11月, 2018 1 次提交
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由 Bin Meng 提交于
This adds a new virtio uclass driver for “virtio” [1] family of devices that are are found in virtual environments like QEMU, yet by design they look like physical devices to the guest. The uclass driver provides child_pre_probe() and child_post_probe() methods to do some common operations for virtio device drivers like device and driver supported feature negotiation, etc. [1] http://docs.oasis-open.org/virtio/virtio/v1.0/virtio-v1.0.pdfSigned-off-by: NTuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 07 10月, 2018 1 次提交
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由 Jens Wiklander 提交于
Adds a uclass to interface with a TEE (Trusted Execution Environment). A TEE driver is a driver that interfaces with a trusted OS running in some secure environment, for example, TrustZone on ARM cpus, or a separate secure co-processor etc. The TEE subsystem can serve a TEE driver for a Global Platform compliant TEE, but it's not limited to only Global Platform TEEs. The over all design is based on the TEE subsystem in the Linux kernel, tailored for U-Boot. Reviewed-by: NSimon Glass <sjg@chromium.org> Tested-by: NIgor Opaniuk <igor.opaniuk@linaro.org> Signed-off-by: NJens Wiklander <jens.wiklander@linaro.org>
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- 30 9月, 2018 1 次提交
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由 Mario Six 提交于
Since there is no canonical "board device" that can be used in board files, it is difficult to use DM function for board initialization in these cases. Hence, add a uclass that implements a simple "board device", which can hold devices not suitable anywhere else in the device tree, and is also able to read encoded information, e.g. hard-wired GPIOs on a GPIO expander, read-only memory ICs, etc. that carry information about the hardware. The devices of this uclass expose methods to read generic data types (integers, strings, booleans) to encode the information provided by the hardware. Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMario Six <mario.six@gdsys.cc>
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- 29 9月, 2018 2 次提交
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由 Maxime Ripard 提交于
We might want to access data stored onto one wire EEPROMs. Create a framework to provide a consistent API. Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> [eugen.hristev@microchip.com: reworked patch] Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
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由 Maxime Ripard 提交于
We might want to use 1-Wire devices connected on boards such as EEPROMs in U-Boot. Provide a framework to be able to do that. Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> [eugen.hristev@microchip.com: reworked] Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
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- 20 9月, 2018 1 次提交
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由 Miquel Raynal 提交于
NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in a raw/ subdirectory, to ease the addition of a core file in nand/ and the introduction of a spi/ subdirectory specific to SPI NANDs. Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
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- 11 9月, 2018 2 次提交
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由 Lokesh Vutla 提交于
Add an option for building remoteproc drivers within SPL. Reviewed-by: NTom Rini <trini@konsulko.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Lokesh Vutla 提交于
Add an option for building mailbox drivers within SPL. Reviewed-by: NTom Rini <trini@konsulko.com> Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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- 11 8月, 2018 1 次提交
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由 Mario Six 提交于
Add a uclass for AXI (Advanced eXtensible Interface) busses, and a driver for the gdsys IHS AXI bus on IHS FPGAs. Signed-off-by: NMario Six <mario.six@gdsys.cc> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 06 8月, 2018 1 次提交
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由 Peng Fan 提交于
Add CONFIG_SPL_POWER_DOMAIN config entry. Build drivers/power/domain if this config is selected. Signed-off-by: NPeng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 20 7月, 2018 1 次提交
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由 Ramon Fried 提交于
This is a uclass for Shared memory manager drivers. A Shared Memory Manager driver implements an interface for allocating and accessing items in the memory area shared among all of the processors. Signed-off-by: NRamon Fried <ramon.fried@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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- 10 7月, 2018 1 次提交
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由 Ley Foon Tan 提交于
Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET, so can use CONFIG_IS_ENABLED(DM_RESET) checking in reset.h later. Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 30 5月, 2018 2 次提交
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由 Alex Kiernan 提交于
Add drivers/fastboot/fb_common.c, where fastboot_okay/fail are implemented so we can call them from a non-USB implementation. Introduce fastboot_response which takes varargs parameters so we can use it to generate formatted response strings. Refactor fastboot_okay/fail to use it. Signed-off-by: NAlex Kiernan <alex.kiernan@gmail.com> Reviewed-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Alex Kiernan 提交于
Separate CMD_FASTBOOT from FASTBOOT and move code and configuration to drivers/fastboot. Switch dependencies on FASTBOOT to USB_FUNCTION_FASTBOOT as anyone who wants FASTBOOT before this series wants USB_FUNCTION_FASTBOOT. Split USB_FUNCTION_FASTBOOT from FASTBOOT so they retain their existing behaviour. Signed-off-by: NAlex Kiernan <alex.kiernan@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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- 28 5月, 2018 1 次提交
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由 Jagan Teki 提交于
USB PHY implementation for Allwinner SOC's can be handling in to single driver with different phy configs. This driver handle all Allwinner USB PHY's start from 4I to 50I(except 9I). Currently added A64 compatibility more will add in next coming patches. Current implementation is unable to get pinctrl, clock and reset details from DT since the dm code on these will add it future. Driver named as phy-sun4i-usb.c since the same PHY logic work for all Allwinner SOC's start from 4I to A64 except 9I with different phy configurations. Signed-off-by: NJagan Teki <jagan@amarulasolutions.com> Acked-by: NJun Nie <jun.nie@linaro.org>
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- 11 5月, 2018 1 次提交
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由 Lukasz Majewski 提交于
New, SPL related config option - CONFIG_SPL_BOOTCOUNT_LIMIT has been added to allow drivers/bootcount code re-usage in SPL. This code is necessary to use and setup bootcount in SPL in the case of falcon boot mode. Signed-off-by: NLukasz Majewski <lukma@denx.de> Reviewed-by: NStefan Roese <sr@denx.de> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NAlex Kiernan <alex.kiernan@gmail.com>
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- 07 5月, 2018 1 次提交
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由 Tom Rini 提交于
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: NTom Rini <trini@konsulko.com>
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- 20 3月, 2018 1 次提交
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由 Patrick Delaunay 提交于
Add option to include RESET driver and uclass in SPL. That can be useful to handle IP reset with same driver in U-Boot and in SPL. Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
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- 05 3月, 2018 1 次提交
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由 Faiz Abbas 提交于
Rename CONFIG_SPL_USBETH_SUPPORT to CONFIG_SPL_USB_ETHER. This enables users to block text using CONFIG_IS_ENABLED() instead of resorting to #if ladders with SPL and non-SPL cases. Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com>
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- 21 11月, 2017 1 次提交
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由 Faiz Abbas 提交于
The dra7xx series of SOCs contain a temperature sensor and an associated analog-to-digital converter (ADC) which produces an output which is proportional to the SOC temperature. Add support for this temperature sensor. Signed-off-by: NFaiz Abbas <faiz_abbas@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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