- 18 9月, 2018 3 次提交
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由 Otavio Salvador 提交于
This adds the device tree to the DFU and bootmenu environment setting. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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- 17 9月, 2018 7 次提交
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由 Georgii Staroselskii 提交于
These comments were copied from the Linux kernel driver in drivers/platform/x86/intel_scu_ipc.c Signed-off-by: NGeorgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Georgii Staroselskii 提交于
Now that we have I2C#6 working, it's time to add a corresponsing ACPI binding. Signed-off-by: NGeorgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Georgii Staroselskii 提交于
Now that we have the pinctrl driver for Merrifield in place we can make use of it and set I2C#6 pins appropriately. Initial configuration came from the firmware. Which quite likely has been used in the phones, where that is not part of Atom peripheral, is in use. Thus we need to override the leftover. Signed-off-by: NGeorgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Georgii Staroselskii 提交于
This API is going to be used to configure some pins that are protected for simple modification. It's not a comprehensive pinctrl driver but can be turned into one when we need this in the future. Now it is planned to be used only in one place. So that's why I decided not to pollute the codebase with a full-blown pinctrl-merrifield nobody will use. This driver reads corresponding fields in DT and configures pins accordingly. The "protected" flag is used to distinguish configuration of SCU-owned pins from the ordinary ones. The code has been adapted from Linux work done by Andy Shevchenko in pinctrl-merrfifield.c Signed-off-by: NGeorgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> [bmeng: fix build warning] Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
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由 Georgii Staroselskii 提交于
This interface will be used to configure properly some pins on Merrifield that are shared with SCU. scu_ipc_raw_command() writes SPTR and DPTR registers before sending a command to SCU. This code has been ported from Linux work done by Andy Shevchenko. Signed-off-by: NGeorgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Christian Gmeiner 提交于
This will add support for a baud rate of 57600. Signed-off-by: NChristian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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- 16 9月, 2018 7 次提交
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由 Angelo Dureghello 提交于
This patch adds mcf5441x eSDHC support for the mcf5441x family. Signed-off-by: NAngelo Dureghello <angelo@sysam.it>
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由 Angelo Dureghello 提交于
On a u32 val = __sw32(*addr); multiple memory accesses are not welcome, since "addr" may be an IO peripheral register address. This patch changes __sw16/32 to perform a single memory access for the source value. Signed-off-by: NAngelo Dureghello <angelo@sysam.it>
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由 Angelo Dureghello 提交于
Signed-off-by: NAngelo Dureghello <angelo@sysam.it>
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- 15 9月, 2018 22 次提交
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由 Marek Vasut 提交于
The Gen2 TMU is fed with fixed 32.5 MHz signal from CP . This is then divided by 4 in TMU. Fix the timer clock setting in Gen2. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
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由 Marek Vasut 提交于
Replace those two functions with generic ones by defining the timer macros in include/config/*.h . Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
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由 Marek Vasut 提交于
The code uses all in all three TMU registers, drop the massive register layout structures and just define the required timer registers and use them throughout the code. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
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由 Marek Vasut 提交于
The header contains only the TMU register layout, just inline it into the TMU timer implementation and drop the header completely. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
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由 Marek Vasut 提交于
The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2, while the old SH parts use CONFIG_SYS_CLK_FREQ directly. Just put this into the TMU implementation and drop the CONFIG_SH_TMU_CLK_FREQ config option. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
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由 Marek Vasut 提交于
This function just returns CONFIG_SH_TMU_CLK_FREQ, use the constant directly instead. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
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由 Marek Vasut 提交于
These functions are always called for timer = 0, so drop the timer check. Since these functions are called from one place only and they are reduced to one line of code, just inline them. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
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由 Marek Vasut 提交于
The tmu_bit value evaluates to (ffs(4) >> 1) - 1 = (3 >> 1) - 1 = 0. Just drop the tmu_bit completely as well as CONFIG_SYS_TMU_CLK_DIV. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
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由 Marek Vasut 提交于
This constant is always 4 , for all boards that exist. Define it once in arch/sh/lib/time.c and remove it from the configs. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
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由 Marek Vasut 提交于
Drop the macro as it is never used and it collides with sh_eth.h macros. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Drop the macro as it is defined in sh7723.h already. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Patrice Chotard 提交于
Add vbus-supply regulator support. On some board vbus is not controlled by the phy but by an external regulator. Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>
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由 Dalon Westergreen 提交于
The dtb should be embedded in the u-boot-spl image so that the CONFIG_SPL_TARGET of spl/u-boot-spl.hex includes it. This also affects the main u-boot image, so adjust CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot.img which now also includes the dtb. Signed-off-by: NDalon Westergreen <dwesterg@gmail.com>
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由 Dalon Westergreen 提交于
Incorrect type of size variable results in 0 being returned for sdram sizes greater than or equal to 4GB. Signed-off-by: NDalon Westergreen <dwesterg@gmail.com>
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由 Dalon Westergreen 提交于
Stratix10 combines the u-boot-spl image into the fpga configuration bitstream so that the SDM can load the processors memory. This process requires a hex format of the u-boot-spl image. CONFIG_SPL_TARGET is set to "spl/u-boot-spl.hex" Signed-off-by: NDalon Westergreen <dwesterg@gmail.com>
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由 Dalon Westergreen 提交于
Some devices, namely Intel's stratix10 SoC, require u-boot-spl in a hex format. This patch adds spl/u-boot-spl.hex as a possible target. Signed-off-by: NDalon Westergreen <dwesterg@gmail.com>
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由 Ley Foon Tan 提交于
This changes the driver to use dev_read_addr() which is safe both for flat trees and live trees. Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
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由 Ley Foon Tan 提交于
Add code to reset all reset signals as in gpio DT node. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present. If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset. Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
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由 Ley Foon Tan 提交于
Enabled get_function support for dwapb where the function will return the state of GPIO port. Signed-off-by: NChin Liang See <chin.liang.see@intel.com> Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
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由 Tom Rini 提交于
This commit is breaking several variants of da850, so: This reverts commit 5f389201. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
I added in the CONFIG_MISC_INIT_R line by mistake when applying the previous patch, fix. Signed-off-by: NTom Rini <trini@konsulko.com>
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- 14 9月, 2018 1 次提交
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