1. 10 12月, 2011 2 次提交
    • C
      S5PC2XX: Rename S5pc2XX to exynos · 393cb361
      Chander Kashyap 提交于
      As per new naming convention for Samsung SoC's, all Cortex-A9 and Cortex-A15
      based SoC's will be classified under the name Exynos. Cortex-A9 and Cortex-A15
      based SoC's will be sub-classified as Exynos4 and Exynos5 respectively.
      
      In order to better adapt and reuse code across various upcoming Samsung Exynos
      based boards, all uses of s5pc210 prefix/suffix/directory-names are renamed in
      this patch. s5pc210 is renamed as exynos4210 and S5PC210/s5pc210 suffix/prefix
      are renamed as exynos4/EXYNOS4.
      Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
      Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
      393cb361
    • S
      tegra2: Add support for Ventana · d5ef19b9
      Stephen Warren 提交于
      Ventana is a board which is very similar to Seaboard. Support it by
      re-using board/nvidia/seaboard/seaboard.c with minor run-time conditionals.
      
      v5: Makefile: Use cmd_link_o_target, remove unused clean/distclean targets.
      v6: Make gpio_config_uart_seaboard() static.
      v7: Add MAINTAINERS entry for Ventana. Tom Warren doesn't have Ventana, so
          he asked me to add myself for this board.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Acked-by: NSimon Glass <sjg@chromium.org>
      Signed-off-by: NTom Warren <twarren@nvidia.com>
      d5ef19b9
  2. 09 12月, 2011 3 次提交
  3. 07 12月, 2011 9 次提交
  4. 02 12月, 2011 1 次提交
  5. 01 12月, 2011 1 次提交
  6. 29 11月, 2011 2 次提交
    • I
      mpc85xx: support for Freescale COM Express P2020 · 9839709e
      Ira W. Snyder 提交于
      This adds support for the Freescale COM Express P2020 board. This board
      is similar to the P1_P2_RDB, but has some extra (as well as missing)
      peripherals.
      
      Unlike all other mpc85xx boards, it uses a watchdog timeout to reset.
      Using the HRESET_REQ register does not work.
      
      This board has no NOR flash, and can only be booted via SD or SPI. This
      procedure is documented in Freescale Document Number AN3659 "Booting
      from On-Chip ROM (eSDHC or eSPI)." Some alternative documentation is
      provided in Freescale Document Number P2020RM "P2020 QorIQ Integrated
      Processor Reference Manual" (section 4.5).
      Signed-off-by: NIra W. Snyder <iws@ovro.caltech.edu>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      9839709e
    • S
      powerpc/p3060qds: Add board related support for P3060QDS platform · ae6b03fe
      Shengzhou Liu 提交于
      The P3060QDS is a Freescale reference board for the six-core P3060 SOC.
      
      P3060QDS Board Overview:
       Memory subsystem:
        - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
        - 128M Bytes NOR flash single-chip memory
        - 16M Bytes SPI flash
        - 8K Bytes AT24C64 I2C EEPROM for RCW
       Ethernet:
        - Eight Ethernet controllers (4x1G + 4x1G/2.5G)
        - Three VSC8641 PHYs on board (2xRGMII + 1xMII)
        - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3
       PCIe: Two PCI Express 2.0 controllers/ports
       USB:  Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board
       I2C:  Four I2C controllers
       UART: Supports two dUARTs up to 115200 bps for console
       RapidIO:  Two RapidIO, sRIO1 and sRIO2
      Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com>
      Signed-off-by: NYork Sun <yorksun@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      ae6b03fe
  7. 16 11月, 2011 2 次提交
  8. 11 11月, 2011 1 次提交
  9. 10 11月, 2011 3 次提交
  10. 08 11月, 2011 2 次提交
  11. 07 11月, 2011 1 次提交
  12. 05 11月, 2011 1 次提交
  13. 04 11月, 2011 6 次提交
  14. 28 10月, 2011 4 次提交
  15. 23 10月, 2011 1 次提交
  16. 22 10月, 2011 1 次提交