LS1028A is an ARMv8 implementation. LS1028ARDB is an evaluation
platform that supports the LS1028A family SoCs. This patch add basic
support of the platform.
Signed-off-by: NSudhanshu Gupta <sudhanshu.gupta@nxp.com>
Signed-off-by: NRai Harninder <harninder.rai@nxp.com>
Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: NBhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: NTang Yuantian <andy.tang@nxp.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Ls1028a SoC is based on Layerscape Chassis Generation 3.2
architecture with features:
 2 ARM v8 Cortex-A72 cores, CCI400, SEC, DDR3L/4, LCD, GPU, TSN
 ENETC, 2 USB 3.0, 2 eSDHC, 2 FlexCAN, 2 SPI, SATA, 8 I2C controllers,
 6 LPUARTs, GPIO, SAI, qDMA, eDMA, GIC, TMU etc.
Signed-off-by: NSudhanshu Gupta <sudhanshu.gupta@nxp.com>
Signed-off-by: NRai Harninder <harninder.rai@nxp.com>
Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: NBhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Signed-off-by: NTang Yuantian <andy.tang@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Enable the PCIe Gen4 controller driver and e1000 for LX2160ARDB
and LX2160AQDS boards.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

The LX2160A integrated 6 PCIe Gen4 controllers.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add the infrastructure for Layerscape SoCs PCIe Gen4 controller
to update device tree nodes to convey SMMU stream IDs in the
device tree.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

The LX2160A PCIe is using driver PCIE_LAYERSCAPE_GEN4 instead
of PCIE_LAYERSCAPE.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Add PCIe Gen4 driver for the NXP Layerscape SoCs. This PCIe
controller is based on the Mobiveil IP, which is compatible
with the PCI Express™ Base Specification, Revision 4.0.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: NBao Xiaowei <Xiaowei.Bao@nxp.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

The lx2160a have up to 6 PCIe controllers and have different
address and size of PCIe region.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

The LS2080A has 8GB region for each PCIe controller, while the
other platforms have 32GB.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Change to use PCIe address macro to determine if precompile the PCIe
MMU table entry.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Update mtd-id for QSPI nor due to change introduced in mtd/spi in
linux 5.0. commit 84d043185dbe
  ("spi: Add a driver for the Freescale/NXP QuadSPI controller")

This modification is only for linux kernel version >= 5.0. To use
bootargs for kernel < 5.0, use the following bootargs
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0
earlycon=uart8250,mmio,0x21c0500
mtdparts=1550000.quadspi:2m(uboot),14m(free)"

CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:2m(uboot),14m(free)"
Signed-off-by: NKuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

- Update MPC83xx platform support to current best practices, etc.

"Please pull mmc-5-20 for v2019.07, this is to avoid break i.MX53 boot."

- update for using splashfile instead of location->name
  when loading the splash image from a FIT
- updates for loading internal and external splash data from FIT
- DM_GPIO/DM_VIDEO migration for mx53 cx9020 board
- fix boot issue on mx6sabresd board after DM_VIDEO migration
- increase the max preallocated framebuffer BPP to 32 in ipuv3
  driver to prepare for configurations with higher color depth
- allow to use vidconsole_put_string() in board code for text
  output on LCD displays

The gdsys gazerbeam board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.

On board peripherals include:
- 2x 10/100 Mbit/s Ethernet (optional)
Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Add a U-Boot specific dts file, which encapsulates the needed
modifications to the Gazerbeam Linux device tree.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Import the Linux device tree for the Gazerbeam board.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

The single channel detection in the gazerbeam board driver was not
implemented correctly.

Fix the detection.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Use a more extensive FPGA feature reporting style in the gdsys ioep-fpga
driver.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Make the ioloop command DM compatible, while keeping the old
functionality for not-yet-converted boards.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Replace the boolean parameter of io_check_status that controls whether
the status is printed or not with a documenting enum.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Fix some style violations in the ioloop command, and make the code more
readable where possible.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

More recent versions of IHS FPGAs feature a different memory layout.

Add a Kconfig option to differentiate between the legacy layout, and the
new layout (which is used on the upcoming "Gazerbeam" and later boards).
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Future gdsys boards will switch from the legacy drivers in board/gdsys/common
to DM-based drivers.

Define a Kconfig option that disables the legacy drivers.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

The "manual" RAM configuration should not be used if the DM RAM driver
is active, hence, disable the code if the CONFIG_MPC83XX_SDRAM config
variable is defined.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Move CONFIG_SYS_FPGA0_BASE, CONFIG_SYS_FPGA0_SIZE, CONFIG_SYS_FPGA1_BASE, and
CONFIG_SYS_FPGA1_SIZE to Kconfig.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Since the gpio output status on MPC8xxx cannot be read back, it has to
be buffered locally.
Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Fix some style violations in the gdsys MPC8308 board files, and make the
code more readable.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

The ppc4xx architecture was removed, and with it several old gdsys 44x
boards, but some "debris" from these purged boards was left over.

This patch removes these remnants (mostly entries in Makefiles, some now
superfluous data structures and some now obsolete config variables from
the whitelist).
Signed-off-by: NMario Six <mario.six@gdsys.cc>

The initialization sequence in the newest release notes of the 88e1518
phy omits two commands.

Remove them from the sequence.
Signed-off-by: NDirk Eibach <dirk.eibach@gdsys.cc>

For the DM case, use the proper parameter for the regmap_init_mem call
(which is the ofnode, not the udevice).
Signed-off-by: NMario Six <mario.six@gdsys.cc>
Reviewed-by: NSimon Glass <sjg@chromium.org>

For the DM case, use the proper parameter for the regmap_init_mem call
(which is the ofnode, not the udevice).
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Make the gdsys_rxaui_ctrl polarity setting function return the old
state to comply with the API requirements.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Improve the error handling and reporting of the IHS I2C driver.
Signed-off-by: NMario Six <mario.six@gdsys.cc>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Since the IHS I2C driver want upstream, the surrounding infrastructure
has changed quite a bit (notably, the fpgamap driver was replaced with a
regmap driver).

Update the driver to work with these changes.
Signed-off-by: NMario Six <mario.six@gdsys.cc>
Reviewed-by: NHeiko Schocher <hs@denx.de>

Use the new hex2bin function in the binop command instead of converting
the data manually.
Signed-off-by: NMario Six <mario.six@gdsys.cc>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Since the binop command was introduced, the environment API was changed.
Use the new API to make the command work again.
Signed-off-by: NMario Six <mario.six@gdsys.cc>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Some DM drivers have hardcoded clk_enable calls when handling
clocks (for example the fsl_esdhc driver).

To work with these drivers, add an enable method to the MCP83xx clock
driver (which does nothing, because the clocks are always enabled).
Signed-off-by: NMario Six <mario.six@gdsys.cc>

To support OF_EMBED, the MPC83xx architecture has to define the "_end"
symbol to correctly access the appended DT.

Fortunately, MPC8xx already defines the symbol, and the linker script is
quite similar to that of MPC83xx, so copy this approach for MPC83xx.
Signed-off-by: NMario Six <mario.six@gdsys.cc>

Lots of stuff in processor.h was taken verbatim from the Linux kernel.
It was never synced, so most of it was removed or changed in the kernel
since it was imported.

Remove all the stuff that is unused in the current U-Boot sources;
should anybody feel the need to re-sync with the kernel, they can do it
later on.
Signed-off-by: NMario Six <mario.six@gdsys.cc>